Lines Matching full:pir
3744 VLAPIC_CTR1(vlapic, msg " pir0 0x%016lx", pir_desc->pir[0]); \
3745 VLAPIC_CTR1(vlapic, msg " pir1 0x%016lx", pir_desc->pir[1]); \
3746 VLAPIC_CTR1(vlapic, msg " pir2 0x%016lx", pir_desc->pir[2]); \
3747 VLAPIC_CTR1(vlapic, msg " pir3 0x%016lx", pir_desc->pir[3]); \
3767 * Keep track of interrupt requests in the PIR descriptor. This is in vmx_set_intr_ready()
3773 atomic_set_long(&pir_desc->pir[idx], mask); in vmx_set_intr_ready()
3865 pirval = pir_desc->pir[i]; in vmx_pending_intr()
3999 * Transfer the pending interrupts in the PIR descriptor to the IRR
4024 val = atomic_readandclear_long(&pir_desc->pir[0]); in vmx_inject_pir()
4032 val = atomic_readandclear_long(&pir_desc->pir[1]); in vmx_inject_pir()
4040 val = atomic_readandclear_long(&pir_desc->pir[2]); in vmx_inject_pir()
4048 val = atomic_readandclear_long(&pir_desc->pir[3]); in vmx_inject_pir()
4067 * the pending bit set, but no PIR bits set. in vmx_inject_pir()
4073 * SET PIR bit in vmx_inject_pir()
4074 * READ/CLEAR PIR bits in vmx_inject_pir()
4077 * pending bit set, PIR 0 in vmx_inject_pir()