Lines Matching +full:0 +full:x080

51 #define	X86_PG_V	0x001	/* P	Valid			*/
52 #define	X86_PG_RW	0x002	/* R/W	Read/Write		*/
53 #define	X86_PG_U	0x004	/* U/S  User/Supervisor		*/
54 #define	X86_PG_NC_PWT	0x008	/* PWT	Write through		*/
55 #define	X86_PG_NC_PCD	0x010	/* PCD	Cache disable		*/
56 #define	X86_PG_A	0x020	/* A	Accessed		*/
57 #define	X86_PG_M	0x040	/* D	Dirty			*/
58 #define	X86_PG_PS	0x080	/* PS	Page size (0=4k,1=2M)	*/
59 #define	X86_PG_PTE_PAT	0x080	/* PAT	PAT index		*/
60 #define	X86_PG_G	0x100	/* G	Global			*/
61 #define	X86_PG_AVAIL1	0x200	/*    /	Available for system	*/
62 #define	X86_PG_AVAIL2	0x400	/*   <	programmers use		*/
63 #define	X86_PG_AVAIL3	0x800	/*    \				*/
64 #define	X86_PG_PDE_PAT	0x1000	/* PAT	PAT index		*/
74 #define	PMAP_MAX_PKRU_IDX	0xf
80 #define	EPT_PG_READ		0x001	/* R	Read		*/
81 #define	EPT_PG_WRITE		0x002	/* W	Write		*/
82 #define	EPT_PG_EXECUTE		0x004	/* X	Execute		*/
83 #define	EPT_PG_IGNORE_PAT	0x040	/* IPAT	Ignore PAT	*/
84 #define	EPT_PG_PS		0x080	/* PS	Page size	*/
85 #define	EPT_PG_A		0x100	/* A	Accessed	*/
86 #define	EPT_PG_M		0x200	/* D	Dirty		*/
89 #define	PG_FRAME	(0x000ffffffffff000ul)
90 #define	PG_PS_FRAME	(0x000fffffffe00000ul)
91 #define	PG_PS_PDP_FRAME	(0x000fffffc0000000ul)
96 #define PGEX_P		0x01	/* Protection violation vs. not present */
97 #define PGEX_W		0x02	/* during a Write cycle */
98 #define PGEX_U		0x04	/* access from User mode (UPL) */
99 #define PGEX_RSV	0x08	/* reserved PTE field is non-zero */
100 #define PGEX_I		0x10	/* during an instruction fetch */
101 #define	PGEX_PK		0x20	/* protection key violation */
102 #define	PGEX_SGX	0x8000	/* SGX-related */