Lines Matching +full:write +full:- +full:access +full:- +full:delay

3   and DMA interfaces that a driver uses to access its PCI controller.
5   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
9   http://opensource.org/licenses/bsd-license.php
56 #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO   0x0001  ///< I/O cycles 0x0000-0x00FF (10 bit dec…
57 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO               0x0002  ///< I/O cycles 0x0100-0x03FF or greater …
59 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY           0x0008  ///< MEM cycles 0xA0000-0xBFFFF (24 bit d…
60 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO               0x0010  ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3…
61 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO       0x0020  ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7…
62 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO     0x0040  ///< I/O cycles 0x170-0x177, 0x376, 0x377…
69 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE      0x2000  ///< Clear for an add-in PCI Device
72 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16            0x10000 ///< I/O cycles 0x0100-0x03FF or greater …
74 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16            0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3…
90   /// A write operation from system memory by a bus master.
94   /// Provides both read and write access to system memory by both the processor and a
141   @param  Delay                 The number of 100 ns units to poll.
144 …@retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteri…
147   @retval EFI_TIMEOUT           Delay expired before a match occurred.
161   IN  UINT64                       Delay,
166   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
174 …  Buffer                For read operations, the destination buffer to store the results. For write
175                                 operations, the source buffer to write data from.
202   /// Write PCI controller registers in the PCI memory or I/O space.
204   EFI_PCI_IO_PROTOCOL_IO_MEM  Write;  member
208   Enable a PCI driver to access PCI controller registers in PCI configuration space.
214 …  Buffer                For read operations, the destination buffer to store the results. For write
215                                 operations, the source buffer to write data from.
240   /// Write PCI controller registers in PCI configuration space.
242   EFI_PCI_IO_PROTOCOL_CONFIG  Write;  member
286   Provides the PCI controller-specific addresses needed to access system memory.
289 …@param  Operation             Indicates if the bus master is going to read or write to system memo…
294                                 access the hosts HostAddress.
384   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
388   @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host
390   @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI
549   /// through the ROM BAR of the PCI controller, or it is from a platform-specific location.