Lines Matching full:memory

2   EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration, 
54 #define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or …
55 #define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cyc…
63 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are com…
65 #define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the …
67 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w access…
68 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range
86 /// A read operation from system memory by a bus master.
90 /// A write operation from system memory by a bus master.
94 /// Provides both read and write access to system memory by both the processor and a
131 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
135 @param Width Signifies the width of the memory or I/O operations.
137 base address for the memory operation to perform.
138 @param Offset The offset within the selected BAR to start the memory operation.
142 @param Result Pointer to the last value read from the memory location.
166 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
169 @param Width Signifies the width of the memory or I/O operations.
171 … base address for the memory or I/O operation to perform.
172 …@param Offset The offset within the selected BAR to start the memory or I/O operat…
173 @param Count The number of memory or I/O operations to perform.
198 /// Read PCI controller registers in the PCI memory or I/O space.
202 /// Write PCI controller registers in the PCI memory or I/O space.
211 @param Width Signifies the width of the memory operations.
247 Enables a PCI driver to copy one region of PCI memory space to another region of PCI
248 memory space.
251 @param Width Signifies the width of the memory operations.
253 base address for the memory operation to perform.
255 start the memory writes for the copy operation.
257 base address for the memory operation to perform.
259 the memory reads for the copy operation.
260 @param Count The number of memory operations to perform. Bytes moved is Width
263 @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
287 Provides the PCI controller-specific addresses needed to access system memory.
290 …aram Operation Indicates if the bus master is going to read or write to system memory.
291 @param HostAddress The system memory address to map to the PCI controller.
323 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
339 @param MemoryType The type of memory to allocate, EfiBootServicesData or
342 @param HostAddress A pointer to store the base system memory address of the
346 @retval EFI_SUCCESS The requested memory pages were allocated.
350 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
365 Frees memory that was allocated with AllocateBuffer().
369 …@param HostAddress The base system memory address of the allocated range. …
371 @retval EFI_SUCCESS The requested memory pages were freed.
372 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
385 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
390 bridge to system memory.
518 /// The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration,
547 /// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
548 /// for allocating memory for the ROM image, and copying the contents of the ROM to memory.