Lines Matching +full:platform +full:- +full:specific

1 .\" Copyright (c) 2016-2017 The FreeBSD Foundation.
32 .Nd Architecture-specific details
40 For full details consult the processor-specific ABI supplement
86 .Bl -column -offset indent "Architecture" "Initial Release"
100 .Bl -column -offset indent "Architecture" "Initial Release" "Final Release"
128 .Bl -tag -width "Dv ILP32"
133 types machine representations all have 4-byte size.
147 Typically these are 64-bit machines, where the
153 environment, which was the historical 32-bit predecessor for 64-bit evolution.
155 .Bl -column -offset indent "powerpc64" "ILP32 counterpart"
171 .Bl -column -offset indent "long long" "Size"
186 require only 4-byte alignment for 64-bit integers.
188 Machine-dependent type sizes:
189 .Bl -column -offset indent "Architecture" "void *" "long double" "time_t"
205 .Bl -column -offset indent "Architecture" "Endianness" "char Signedness"
218 .Bl -column -offset indent "Architecture" "Page Sizes"
231 .Bl -column -offset indent "riscv64 (Sv48)" "0x0001000000000000" "NNNU"
251 Historically, amd64 CPUs were limited to a 48-bit virtual address space.
252 Newer CPUs support 5-level page tables, which extend the significant bits of
257 tunable to 0 forces the system into 4-level paging mode, even on hardware that
258 supports 5-level paging.
259 In this mode, all processes get a 48-bit address space.
263 a 48-bit address space by default.
269 utility can be used to request LA48 or LA57 mode for specific executables.
274 The RISC-V specification permits 3-level (Sv39), 4-level (Sv48), and
275 5-level (Sv57) page tables.
285 .Bl -column -offset indent "Architecture" "float, double" "long double"
314 should be preferred when there is something specific to a particular type of
318 when referring to the kernel, interfaces dependent on a specific type of kernel
320 .Bl -column -offset indent "Dv MACHINE" "Dv MACHINE_CPUARCH" "Dv MACHINE_ARCH"
331 Some of these provide architecture-specific details and are explained below.
336 .Bd -literal -offset indent
337 cc -x c -dM -E /dev/null
341 .Bl -column -offset indent "BYTE_ORDER" "Meaning"
343 .It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int
344 .It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer
351 Architecture-specific macros:
352 .Bl -column -offset indent "Architecture" "Predefined macros"
365 Compilers may define additional variants of architecture-specific macros.
374 .Bl -tag -width "MACHINE_CPUARCH"
376 Represents the hardware platform.
377 This is the same as the native platform's
394 hardware platforms, one hardware platform may support multiple CPU
398 of i386 supported the IBM-AT hardware platform while the
400 of pc98 supported the Japanese company NEC's PC-9801 and PC-9821
405 userland interfaces relating to underlying hardware platform
418 It may also encode a variation in the byte ordering of multi-byte
432 If we ever were to support the so-called x32 ABI (using 32-bit
434 as amd64-x32.
435 It is unfortunate that amd64 specifies the 64-bit evolution of the x86 platform
460 It is used to optimize the build for a specific CPU / core that the
463 between optimization for specific cases.