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72 EIA RS-232C (CCITT V.24) serial communications interface.
112 It contains the bus attachments and the low-level interrupt handler.
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195 Invert the pulse (RS-232 logic low = ASSERT, high = CLEAR).
215 level signals, or when the PPS source emits inverted pulses.
216 RFC 2783 defines an ASSERT event as a higher-voltage line level, and a CLEAR
217 event as a lower-voltage line level, in the context of the RS-232 protocol.
218 The modem control signals on a TTL-level connection are typically
219 inverted from the RS-232 levels.
220 For example, carrier presence is indicated by a high signal on an RS-232
223 TTL and RS-232 line levels in most hardware designs.
224 Generally speaking, a connection to a DB-9 style connector is an RS-232
226 A connection to header pins or an edge-connector on an embedded board
231 driver also supports an initial-state and a lock-state control
234 from those of the corresponding initial-state device
238 in the normal way on the initial-state devices to program
245 on the lock-state device.
247 may be locked by setting the corresponding value in the lock-state
251 on the initial-state device and
253 on the lock-state device.
259 In particular, the initial states for non (POSIX) standard flags
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286 Enable the so-called
289 For NS 16550-compatible devices, this will use heuristics to ensure that the
291 DesignWare-based UARTs need this due to a design flaw in the UART.
304 driver to not program the baud rate divisor and use the hardware as-is.
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328 Specifies the physical address of a memory-mapped UART.
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363 corresponding callin initial-state and lock-state devices
369 corresponding callout initial-state and lock-state devices