Lines Matching +full:full +full:- +full:frame

15 .\" 4. Neither the name of the author nor the names of any co-contributors
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60 descriptor-based data transfer mechanism.
74 supports both 10 and 100Mbps speeds in either full or half duplex.
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100 .Ar full-duplex
102 .Ar half-duplex
109 .Ar full-duplex
111 .Ar half-duplex
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119 .It full-duplex
120 Force full duplex operation.
121 .It half-duplex
134 .Bl -bullet -compact
146 BUFFALO (Melco INC.) LPC-CB-CLX (CardBus)
148 Compaq HNE-300
150 CompUSA no-name 10/100 PCI Ethernet NIC
152 Corega FEther CB-TXD
154 Corega FEtherII CB-TXD
156 D-Link DFE-520TX (rev. C1)
158 D-Link DFE-528TX
160 D-Link DFE-530TX+
162 D-Link DFE-538TX
164 D-Link DFE-690TXD
166 Edimax EP-4103DL CardBus
168 Encore ENL832-TX 10/100 M PCI
174 GigaFast Ethernet EE100-AXP
176 KTX-9130TX 10/100 Fast Ethernet
178 LevelOne FPC-0106TX
180 Longshine LCS-8038TX-R
182 NDC Communications NE100TX-E
184 Netronix Inc.\& EA-1210 NetEther 10/100
188 OvisLink LEF-8129TX
190 OvisLink LEF-8139TX
192 Peppercon AG ROL-F
194 Planex FNW-3603-TX
196 Planex FNW-3800-TX
198 SMC EZ Card 10/100 PCI 1211-TX
200 SOHO (PRAGMATIC) UE-1211C
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207 A non-zero value enables I/O space register mapping.
212 Non-zero value enables the long cable tuning on the specified device.
216 .Bl -diag
229 .It "rl%d: chip is in D3 power state -- setting to D0"
237 it back to full power mode in time, it will not be able to configure it
240 the adapter back to the D0 (full power) state, but this may not be
294 is posted to signal that a frame has been received, it is possible that
295 another frame might be in the process of being copied into the receive
298 manages to finish processing the first frame before the chip is done
299 DMAing the rest of the next frame, the driver may attempt to process
300 the next frame in the buffer before the chip has had a chance to finish
303 The driver can check for an incomplete frame by inspecting the frame
305 frame will have the magic length of 0xFFF0.