Lines Matching +full:device +full:- +full:level

32 .Cd "device ppbus"
34 .Cd "device lpt"
35 .Cd "device plip"
36 .Cd "device ppi"
37 .Cd "device pps"
38 .Cd "device lpbb"
42 system provides a uniform, modular and architecture-independent
45 .Sh DEVICE DRIVERS
48 .Bl -bullet -offset indent
50 architecture-independent macros or functions to access parallel ports
57 with kernel-in drivers.
61 and non-standard software:
63 .Bl -column "Driver" -compact
67 .It Sy lpbb Ta "Philips official parallel port I2C bit-banging interface"
73 .Bl -column "Driver" -compact
86 parallel port bus, then initialize it and upper peripheral device drivers.
100 .Bl -bullet -offset indent
104 bidirectional 8/4-bits mode, also called NIBBLE mode
130 In this mode, outputs are 8-bits long.
136 any transfer is 8-bits long.
145 .Bl -item -offset indent
160 difference at hardware level is the strobe of the byte placed on the data
168 operate at close to the same performance levels as an equivalent ISA plug-in
171 At software level, you may implement the protocol you wish, using data and
188 .Sh IEEE1284-1994 Standard
200 at signal level.
236 as a set of procedures that perform high level functions like negotiation,
237 termination, transfer in any mode without bothering you with low level
246 .Ss adapter, ppbus and device layers
251 chipset abstraction throw a set of low level functions that maps the logical
257 .Bl -enum -offset indent
259 share the parallel port bus among the daisy-chain like connected devices
263 propose an arch-independent interface to access the hardware layer.
267 .Em device
268 layer gathers the parallel peripheral device drivers.
274 With this level of abstraction a particular chipset may commute from any
280 This architecture should support IEEE1284-1994 modes.
292 draft from (c)1993-4 Microsoft Corporation)
293 then probes and attaches known device drivers.
295 During probe, device drivers are supposed to request the ppbus and try to
305 High level interrupt handlers are connected to the ppbus system thanks to the
319 is a general purpose mechanism to allow fast low-level
322 standard (in IEEE1284 modes) or non-standard transfers.
325 the job at adapter level.
331 Standard I/O operations are implemented at ppbus level whereas basic I/O
332 operations and microseq language are coded at adapter level for efficiency.