Lines Matching +full:system +full:- +full:bus

30 .Nd I2C bus system
41 system provides a uniform, modular and architecture-independent
42 system for the implementation of drivers to control various I2C devices
45 I2C is an acronym for Inter Integrated Circuit bus.
46 The I2C bus was developed
49 easy way to connect a CPU to peripheral chips in a TV-set.
51 The BUS physically consists of 2 active wires and a ground connection.
56 Every component hooked up to the bus has its own unique address whether it
63 more BUS MASTERs.
65 The BUS MASTER is the chip issuing the commands on the BUS.
68 bus is considered the BUS MASTER.
70 as the BUS SLAVEs.
71 As mentioned before, the IC bus is a Multi-MASTER BUS.
77 .Bl -column "Device drivers" -compact
89 8-bit characters they write to the bus according to the I2C protocol.
91 I2C interfaces may act on the bus as slave devices, allowing spontaneous
92 bidirectional communications, thanks to the multi-master capabilities of the
97 .Bl -column "Interface drivers" -compact
100 .It Sy iicbb Ta "generic bit-banging master-only driver"
101 .It Sy lpbb Ta "parallel port specific bit-banging interface"
103 .Sh BUS FREQUENCY CONFIGURATION
104 The operating frequency of an I2C bus may be fixed or configurable.
105 The bus may be used as part of some larger standard interface, and that
109 A general purpose I2C bus, such as those found in many embedded systems,
110 will often support multiple bus frequencies.
112 When a system supports multiple I2C buses, a different frequency can
113 be configured for each bus by number, represented by the
132 Configure the I2C bus speed using the FDT standard
133 .Va clock-frequency
142 Reset the bus using