Lines Matching +full:number +full:- +full:of +full:- +full:wires

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41 system provides a uniform, modular and architecture-independent
42 system for the implementation of drivers to control various I2C devices
49 easy way to connect a CPU to peripheral chips in a TV-set.
51 The BUS physically consists of 2 active wires and a ground connection.
52 The active wires, SDA and SCL, are both bidirectional.
58 Each of these chips
71 As mentioned before, the IC bus is a Multi-MASTER BUS.
72 This means that more than one IC capable of initiating data transfer can be
77 .Bl -column "Device drivers" -compact
89 8-bit characters they write to the bus according to the I2C protocol.
92 bidirectional communications, thanks to the multi-master capabilities of the
97 .Bl -column "Interface drivers" -compact
100 .It Sy iicbb Ta "generic bit-banging master-only driver"
101 .It Sy lpbb Ta "parallel port specific bit-banging interface"
104 The operating frequency of an I2C bus may be fixed or configurable.
105 The bus may be used as part of some larger standard interface, and that
113 be configured for each bus by number, represented by the
116 Buses can be configured using any combination of device hints,
133 .Va clock-frequency
134 property of the node describing the I2C controller hardware.