Lines Matching +full:write +full:- +full:data

19 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
45 .Bl -tag -width ".Dv I2CRPTSTART"
53 element consists of a 7-bit address and a read/write bit
54 (that is, a 7-bit address << 1 | r/w).
55 A read operation is initiated when the read/write bit is set, or a write
90 Writes data to the
100 element is the number of bytes to write.
104 It must be zero when additional read commands will follow, or non-zero if this
108 element is a pointer to the data to write to the bus.
111 Reads data from the
125 It must be zero when additional read commands will follow, or non-zero if this
129 element is a pointer to where to store the data read from the bus.
133 Generic read/write interface.
149 Otherwise the transfer is a write transfer.
152 element specifies the 7-bit address with the read/write bit for the transfer.
153 The read/write bit will be handled by the iicbus stack based on the specified
163 element is a buffer for that data.
173 .Xr write 2
175 The argument is an 8-bit address (that is, a 7-bit address << 1).
176 The read/write bit in the least-significant position is ignored.
177 Any subsequent read or write operation will set or clear that bit as needed.
180 The following data structures are defined in
183 .Bd -literal -offset indent
196 #define	IIC_M_WR	0	/* Fake flag for write */
197 #define	IIC_M_RD	0x0001	/* read vs write */
213 .Xr write 2 ,
216 The address used for the read/write operation is the one passed to the most
231 stops any transaction established by a not-yet-terminated
234 Because addressing state is stored on a per-file-descriptor basis, it is
240 exclusive-ownership requests issued to the underlying iicbus instance.
244 .Xr write 2 ,
252 .An -nosplit