Lines Matching +full:interrupt +full:- +full:counter
5 .\" ----------------------------------------------------------------------------
6 .\" "THE BEER-WARE LICENSE" (Revision 42):
9 .\" this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
10 .\" ----------------------------------------------------------------------------
16 .A "Poul-Henning Kamp" "The FreeBSD Project"
18 The FreeBSD timecounters are an architecture-independent implementation
21 multiplication to canonical timescales based on micro- or nano-seconds
23 synchronisation. Timecounters are implemented using lock-less
24 stable-storage based primitives which scale efficiently in SMP
80 for instance transport or consumption of a substance at a well-known
90 sun-dial Earths rotation about its axis.
94 atomic Quantum-state transitions in atoms.
108 with an error less than �2 cdot 10 sup{-15}� [DMK2001] with commercially
109 available products doing better than �1 cdot 10 sup{-14}� [AG2002].
137 Earth. This resulted in time-intervals being very unwieldy business,
140 Eventually the new leap-second method were introduced in 1972.
149 UTC is defined basically the same way, but every so often a leap-second
161 and measurement company formerly known as ``Hewlett-Packard'') which
165 custom-design units like the PTB2 and NIST7.
172 The perceived wisdom of leap-seconds have been gradually decreasing
173 in recent years, as devices and products with built-in calendar
181 as the count of standard seconds since 00:00:00 01-01-1970 UTC,
182 ignoring the leap-seconds. This definition has never been perceived
193 deficiency by transmitting the UTC-TAI offset as part of the protocol.
197 ``timespec''. Both of these formats are two-component structures
206 t3.tv_sec = t1.tv_sec - t2.tv_sec;
207 t3.tv_nsec = t1.tv_nsec -
211 t3.tv_nsec -= 1000000000;
213 t3.tv_sec--;
238 Resolution in clocks is simply a matter of the step-size of the
239 counter or in other words: the rate at which it steps.
240 A counter running on a 1 MHz frequency will have a resolution
264 representation as the diameter of the bullet-hole is not correct,
267 gets too quantum-mechanical-oid to serve the instructional purpose.
275 On the x-axis we have time and on the y-axis how wrong the clock
289 devices, once you get into the �10 cdot 10 sup{-15}� territory
295 This particularly becomes an issue with space-based atomic standards
350 mostly a question of the resolution and steer-ability requirements.
366 chosen hardware and this hardware might be the GHz range CPU-clock.
375 �2 sup{32} / (2 sup{32}-1)� �=� 1.000 Hz
392 �2 sup{64} / (2 sup{64}-1)� �=� 1.000 Hz
411 timespec formats is that it is a binary number, not a pseudo-decimal
427 u = bt1->frac;
428 bt3->frac = bt1->frac + bt2->frac;
429 bt3->sec = bt1->sec + bt2->sec;
430 if (u > bt3->frac)
431 bt3->sec += 1;
446 ts->tv_sec = bt->sec;
447 ts->tv_nsec =
449 (uint32_t)(bt->frac >> 32)) >> 32;
460 bt->sec = ts->tv_sec;
463 bt->frac = ts->tv_nsec *
473 reads the hardware counter, subtracts a reference
474 count to find the number of steps the counter has
522 The delta-count operation is straightforward subtraction, but we
523 need to logically AND the result with a bit-mask with the same number
524 (or less) bits as the counter implements,
525 to prevent higher order bits from getting set when the counter rolls over:
529 Delta Count = (Count sub{now} - Count sub{ref}) ~ BITAND ~ mask
536 T sub{now} = Delta Count cdot R sub{counter} + T sub{ref}
539 The scaling factor �R sub{counter}� will be described below.
544 A timestamp with associated hardware counter reading is elevated
550 Delta Count = (Count sub{now} - Count sub{ref}) ~ BITAND ~ mask
555 T sub{now} = Delta Count cdot R sub{counter}
571 to calculate the new scaling factor �R sub{counter}�:
575 R sub{counter} = {2 sup{64} over Freq sub{counter}} cdot ( 1 + R sub{NTP} )
584 R sub{counter} = 2 cdot {2 sup{63} over Freq sub{counter}} cdot ( 1 + R sub{NTP} )
589 This quasi-decimal number is a bit of a square peg in our round binary
600 within an factor of a million of the �10 sup{-15}� performance level
606 In this case the correction may be as large as \(+- 5000 PPM which
607 leaves us room to multiply with about 850 in a multiply-before-divide
614 A divide-before-multiply approximation necessarily results in a loss
624 of the requested change, or �1.06 cdot 10 sup -14� per nanosecond
633 R sub{counter} = 2 cdot {{2 sup{63} + 2199 cdot {R sub{NTP}} over 1024} over Freq sub{counter}}
641 The hardware counter should have a long enough
642 period, ie, number of distinct counter values divided by
657 At HZ=100 a 16 bit counter can run no faster than:
664 Similarly, if the counter runs at 10MHz, the minimum HZ is
688 This would however be a very heavy-handed approach. First of
693 and not old enough to cause an ambiguity with hardware counter
696 A pseudo-stable-storage with generation count method has been
709 suffered an interrupt which resulted in the above periodic processing
712 meta-data.
715 This scheme has an inherent risk that a process may be de-scheduled for
731 gen = th->th_generation;
734 gen != th->th_generation);
740 frequency, the number of bits implemented by the counter and a method
741 function to read the counter.
763 for timecounting is a wide binary counter running at a constant
766 instruction(-sequence).
776 one of which is wired so it can interrupt the CPU when the
779 The problem with this device is that it only has 8bit bus-width,
784 Obviously, on multi-CPU systems this cannot be done without some
790 might be reading a timestamp when an interrupt comes in, and since
791 the interrupt thread might also attempt to generate a timestamp,
796 counter to provide the periodic interrupts which schedule the
798 fact that the counter does not count down from a power of two and
799 that an interrupt is generated right after the reloading of the
800 counter when it reaches zero.
802 Ohh, and did I mention that the interrupt rate for hardclock() will
815 counter'' called ``TSC'' in official data-sheets.
816 This is basically a on-CPU counter, which counts at the rate
839 Another wiggle for the TSC is that it is not usable on multi-CPU
840 systems because the counter is implemented inside the CPU and
852 counter running at a standardised constant frequency and
857 The reason for this odd-ball frequency has to be sought in the ghastly
867 have failed to provide latching suitable to avoid meta-stability
868 problems, and several readings from the counter is necessary to
873 An initialization routine tries to test if the ACPI counter is properly
874 latched by examining the width of a histogram over read delta-values.
884 One example of this is the Loran-C receiver designed by Prof. Dave Mills
887 implements the software-half of the receiver has properly initialised
888 and locked onto a Loran-C signal.
908 external signals to latch the reading of the counter when
914 a precision of \(+- 10 nanoseconds \(+- one count which in practice
915 averages out to roughly \(+- 15 nanoseconds\**:
934 to trigger an interrupt via the DCD pin on a serial port, and
935 the interrupt handler calls \fCnanotime()\fP to timestamp
946 It is painfully obvious that the interrupt latency is the
957 The source-code is located almost entirely in the kernel source file
966 open source license or the even more free ``Beer-ware'' license.
985 Various micro-optimizations, mostly to compensate for inadequate
1003 NTP, for lending out the neglected twin Loran-C receiver and for
1013 The staff at the NELS Loran-C control station in B�, Norway for providing
1014 information about step-changes.
1016 The staff at NELS Loran-C station Ei�e, Faeroe
1037 Poul-Henning Kamp
1041 "A computer-controlled LORAN-C receiver for precision timekeeping."
1043 Electrical Engineering Department Report 92-3-1, University of Delaware, March 1992, 63 pp.
1046 …ime and Time Interval (PTTI) Applications and Planning Meeting (Reston VA, November 2000), 431-439.
1050 Mills, D.L., and P.-H. Kamp.
1051 …ime and Time Interval (PTTI) Applications and Planning Meeting (Reston VA, November 2000), 423-430.
1066 This ``gee-wiz'' kind of article in Dr. Dobbs Journal is a good place to