3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
4         "Counter": "0,1,2,3",  string
5         "CounterHTOff": "0,1,2,3,4,5,6,7",
7         "EventCode": "0x14",
10         "UMask": "0x1"
14         "Counter": "0,1,2,3",  string
15         "CounterHTOff": "0,1,2,3,4,5,6,7",
17         "EventCode": "0xC4",
24         "Counter": "0,1,2,3",  string
25         "CounterHTOff": "0,1,2,3",
27         "EventCode": "0xC4",
32         "UMask": "0x4"
36         "Counter": "0,1,2,3",  string
37         "CounterHTOff": "0,1,2,3,4,5,6,7",
39         "EventCode": "0xC4",
44         "UMask": "0x1"
48         "Counter": "0,1,2,3",  string
49         "CounterHTOff": "0,1,2,3,4,5,6,7",
51         "EventCode": "0xc4",
55         "UMask": "0x10"
59         "Counter": "0,1,2,3",  string
60         "CounterHTOff": "0,1,2,3,4,5,6,7",
62         "EventCode": "0xC4",
67         "UMask": "0x40"
71         "Counter": "0,1,2,3",  string
72         "CounterHTOff": "0,1,2,3,4,5,6,7",
74         "EventCode": "0xC4",
79         "UMask": "0x2"
83         "Counter": "0,1,2,3",  string
84         "CounterHTOff": "0,1,2,3,4,5,6,7",
86         "EventCode": "0xC4",
91         "UMask": "0x8"
95         "Counter": "0,1,2,3",  string
96         "CounterHTOff": "0,1,2,3,4,5,6,7",
98         "EventCode": "0xC4",
103         "UMask": "0x20"
107         "Counter": "0,1,2,3",  string
108         "CounterHTOff": "0,1,2,3,4,5,6,7",
110         "EventCode": "0xC4",
114         "UMask": "0x10"
118         "Counter": "0,1,2,3",  string
119         "CounterHTOff": "0,1,2,3,4,5,6,7",
120         "EventCode": "0xC5",
127         "Counter": "0,1,2,3",  string
128         "CounterHTOff": "0,1,2,3",
129         "EventCode": "0xC5",
134         "UMask": "0x4"
138         "Counter": "0,1,2,3",  string
139         "CounterHTOff": "0,1,2,3,4,5,6,7",
140         "EventCode": "0xC5",
145         "UMask": "0x1"
149         "Counter": "0,1,2,3",  string
150         "CounterHTOff": "0,1,2,3,4,5,6,7",
151         "EventCode": "0xC5",
156         "UMask": "0x2"
160         "Counter": "0,1,2,3",  string
161         "CounterHTOff": "0,1,2,3,4,5,6,7",
162         "EventCode": "0xC5",
166         "UMask": "0x20"
170         "Counter": "0,1,2,3",  string
171         "CounterHTOff": "0,1,2,3,4,5,6,7",
172         "EventCode": "0x3C",
175         "UMask": "0x2"
179         "Counter": "0,1,2,3",  string
180         "CounterHTOff": "0,1,2,3,4,5,6,7",
181         "EventCode": "0x3C",
184         "UMask": "0x1"
189         "Counter": "0,1,2,3",  string
190         "CounterHTOff": "0,1,2,3,4,5,6,7",
191         "EventCode": "0x3C",
194         "UMask": "0x1"
198         "Counter": "0,1,2,3",  string
199         "CounterHTOff": "0,1,2,3,4,5,6,7",
200         "EventCode": "0x3C",
203         "UMask": "0x2"
207         "Counter": "Fixed counter 2",  string
208         "CounterHTOff": "Fixed counter 2",
210 …counter. This event can approximate elapsed time while the core was not in a halt state. This even…
212         "UMask": "0x3"
216         "Counter": "0,1,2,3",  string
217         "CounterHTOff": "0,1,2,3,4,5,6,7",
218         "EventCode": "0x3C",
221         "UMask": "0x1"
226         "Counter": "0,1,2,3",  string
227         "CounterHTOff": "0,1,2,3,4,5,6,7",
228         "EventCode": "0x3C",
231         "UMask": "0x1"
234         "BriefDescription": "Counts when there is a transition from ring 1, 2 or 3 to ring 0.",
235         "Counter": "0,1,2,3",  string
236         "CounterHTOff": "0,1,2,3,4,5,6,7",
239         "EventCode": "0x3C",
241 …Counts when the Current Privilege Level (CPL) transitions from ring 1, 2 or 3 to ring 0 (Kernel).",
246         "Counter": "Fixed counter 1",  string
247         "CounterHTOff": "Fixed counter 1",
249 …e the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the four…
251         "UMask": "0x2"
256         "Counter": "Fixed counter 1",  string
257         "CounterHTOff": "Fixed counter 1",
260         "UMask": "0x2"
264         "Counter": "0,1,2,3",  string
265         "CounterHTOff": "0,1,2,3,4,5,6,7",
266         "EventCode": "0x3C",
274         "Counter": "0,1,2,3",  string
275         "CounterHTOff": "0,1,2,3,4,5,6,7",
276         "EventCode": "0x3C",
282         "Counter": "0,1,2,3",  string
283         "CounterHTOff": "0,1,2,3,4,5,6,7",
285         "EventCode": "0xA3",
288         "UMask": "0x8"
292         "Counter": "0,1,2,3",  string
293         "CounterHTOff": "0,1,2,3,4,5,6,7",
295         "EventCode": "0xA3",
298         "UMask": "0x1"
302         "Counter": "0,1,2,3",  string
303         "CounterHTOff": "0,1,2,3,4,5,6,7",
305         "EventCode": "0xA3",
308         "UMask": "0x10"
312         "Counter": "0,1,2,3",  string
313         "CounterHTOff": "0,1,2,3,4,5,6,7",
315         "EventCode": "0xA3",
318         "UMask": "0xc"
322         "Counter": "0,1,2,3",  string
323         "CounterHTOff": "0,1,2,3,4,5,6,7",
325         "EventCode": "0xA3",
328         "UMask": "0x5"
332         "Counter": "0,1,2,3",  string
333         "CounterHTOff": "0,1,2,3",
335         "EventCode": "0xA3",
338         "UMask": "0x14"
342         "Counter": "0,1,2,3",  string
343         "CounterHTOff": "0,1,2,3,4,5,6,7",
345         "EventCode": "0xA3",
348         "UMask": "0x4"
352         "Counter": "0,1,2,3",  string
353         "CounterHTOff": "0,1,2,3,4,5,6,7",
354         "EventCode": "0xA6",
358         "UMask": "0x2"
362         "Counter": "0,1,2,3",  string
363         "CounterHTOff": "0,1,2,3,4,5,6,7",
364         "EventCode": "0xA6",
368         "UMask": "0x4"
372         "Counter": "0,1,2,3",  string
373         "CounterHTOff": "0,1,2,3,4,5,6,7",
374         "EventCode": "0xA6",
378         "UMask": "0x8"
382         "Counter": "0,1,2,3",  string
383         "CounterHTOff": "0,1,2,3,4,5,6,7",
384         "EventCode": "0xA6",
388         "UMask": "0x10"
392         "Counter": "0,1,2,3",  string
393         "CounterHTOff": "0,1,2,3,4,5,6,7",
394         "EventCode": "0xA6",
397         "UMask": "0x40"
401         "Counter": "0,1,2,3",  string
402         "CounterHTOff": "0,1,2,3,4,5,6,7",
403         "EventCode": "0xA6",
407         "UMask": "0x1"
411         "Counter": "0,1,2,3",  string
412         "CounterHTOff": "0,1,2,3,4,5,6,7",
413         "EventCode": "0x87",
415 …0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the num…
417         "UMask": "0x1"
421         "Counter": "0,1,2,3",  string
422         "CounterHTOff": "0,1,2,3,4,5,6,7",
423         "EventCode": "0x55",
427         "UMask": "0x1"
431         "Counter": "Fixed counter 0",  string
432         "CounterHTOff": "Fixed counter 0",
434 …-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during har…
436         "UMask": "0x1"
439         "BriefDescription": "Number of instructions retired. General Counter - architectural event",
440         "Counter": "0,1,2,3",  string
441         "CounterHTOff": "0,1,2,3,4,5,6,7",
443         "EventCode": "0xC0",
445 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
450         "Counter": "0,1,2,3",  string
451         "CounterHTOff": "0,1,2,3,4,5,6,7",
453         "EventCode": "0xC0",
457         "UMask": "0x2"
461         "Counter": "1",  string
464         "EventCode": "0xC0",
469         "UMask": "0x1"
473         "Counter": "0,2,3",  string
474         "CounterHTOff": "0,2,3",
477         "EventCode": "0xC0",
483         "UMask": "0x1"
486 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path …
487         "Counter": "0,1,2,3",  string
488         "CounterHTOff": "0,1,2,3,4,5,6,7",
489         "EventCode": "0x0D",
492         "UMask": "0x80"
496         "Counter": "0,1,2,3",  string
497         "CounterHTOff": "0,1,2,3,4,5,6,7",
498         "EventCode": "0x0D",
502         "UMask": "0x1"
507         "Counter": "0,1,2,3",  string
508         "CounterHTOff": "0,1,2,3,4,5,6,7",
509         "EventCode": "0x0D",
512         "UMask": "0x1"
516         "Counter": "0,1,2,3",  string
517         "CounterHTOff": "0,1,2,3,4,5,6,7",
518         "EventCode": "0x03",
522         "UMask": "0x8"
526         "Counter": "0,1,2,3",  string
527         "CounterHTOff": "0,1,2,3,4,5,6,7",
528         "EventCode": "0x03",
532         "UMask": "0x2"
536         "Counter": "0,1,2,3",  string
537         "CounterHTOff": "0,1,2,3,4,5,6,7",
538         "EventCode": "0x07",
542         "UMask": "0x1"
546         "Counter": "0,1,2,3",  string
547         "CounterHTOff": "0,1,2,3,4,5,6,7",
548         "EventCode": "0x4C",
550 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
552         "UMask": "0x1"
556         "Counter": "0,1,2,3",  string
557         "CounterHTOff": "0,1,2,3,4,5,6,7",
559         "EventCode": "0xA8",
561 …"PublicDescription": "Counts the cycles when 4 uops are delivered by the LSD (Loop-stream detector…
563         "UMask": "0x1"
567         "Counter": "0,1,2,3",  string
568         "CounterHTOff": "0,1,2,3,4,5,6,7",
570         "EventCode": "0xA8",
572 …iption": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",
574         "UMask": "0x1"
578         "Counter": "0,1,2,3",  string
579         "CounterHTOff": "0,1,2,3,4,5,6,7",
580         "EventCode": "0xA8",
582 … "PublicDescription": "Number of uops delivered to the back-end by the LSD(Loop Stream Detector).",
584         "UMask": "0x1"
588         "Counter": "0,1,2,3",  string
589         "CounterHTOff": "0,1,2,3,4,5,6,7",
592         "EventCode": "0xC3",
595         "UMask": "0x1"
598         "BriefDescription": "Self-modifying code (SMC) detected.",
599         "Counter": "0,1,2,3",  string
600         "CounterHTOff": "0,1,2,3,4,5,6,7",
601         "EventCode": "0xC3",
603 …   "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
605         "UMask": "0x4"
608 …"BriefDescription": "Number of times a microcode assist is invoked by HW other than FP-assist. Exa…
609         "Counter": "0,1,2,3",  string
610         "CounterHTOff": "0,1,2,3,4,5,6,7",
611         "EventCode": "0xC1",
614         "UMask": "0x3f"
618         "Counter": "0,1,2,3",  string
619         "CounterHTOff": "0,1,2,3,4,5,6,7",
620         "EventCode": "0x59",
624         "UMask": "0x1"
627         "BriefDescription": "Resource-related stall cycles",
628         "Counter": "0,1,2,3",  string
629         "CounterHTOff": "0,1,2,3,4,5,6,7",
630         "EventCode": "0xa2",
632         "PublicDescription": "Counts resource-related stall cycles.",
634         "UMask": "0x1"
638         "Counter": "0,1,2,3",  string
639         "CounterHTOff": "0,1,2,3,4,5,6,7",
640         "EventCode": "0xA2",
642 …B) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-e…
644         "UMask": "0x8"
648         "Counter": "0,1,2,3",  string
649         "CounterHTOff": "0,1,2,3,4,5,6,7",
650         "EventCode": "0xCC",
654         "UMask": "0x20"
658         "Counter": "0,1,2,3",  string
659         "CounterHTOff": "0,1,2,3,4,5,6,7",
660         "EventCode": "0xCC",
663         "UMask": "0x40"
667         "Counter": "0,1,2,3",  string
668         "CounterHTOff": "0,1,2,3,4,5,6,7",
669         "EventCode": "0x5E",
671 …vation station (RS) is empty for the thread.; Note: In ST-mode, not active thread should drive 0. …
673         "UMask": "0x1"
677         "Counter": "0,1,2,3",  string
678         "CounterHTOff": "0,1,2,3,4,5,6,7",
681         "EventCode": "0x5E",
684 …eservation Station (RS) was empty. Could be useful to precisely locate front-end Latency Bound iss…
686         "UMask": "0x1"
689         "BriefDescription": "Cycles per thread when uops are executed in port 0",
690         "Counter": "0,1,2,3",  string
691         "CounterHTOff": "0,1,2,3,4,5,6,7",
692         "EventCode": "0xA1",
694 …": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the R…
696         "UMask": "0x1"
700         "Counter": "0,1,2,3",  string
701         "CounterHTOff": "0,1,2,3,4,5,6,7",
702         "EventCode": "0xA1",
704 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
706         "UMask": "0x2"
710         "Counter": "0,1,2,3",  string
711         "CounterHTOff": "0,1,2,3,4,5,6,7",
712         "EventCode": "0xA1",
714 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
716         "UMask": "0x4"
720         "Counter": "0,1,2,3",  string
721         "CounterHTOff": "0,1,2,3,4,5,6,7",
722         "EventCode": "0xA1",
724 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
726         "UMask": "0x8"
730         "Counter": "0,1,2,3",  string
731         "CounterHTOff": "0,1,2,3,4,5,6,7",
732         "EventCode": "0xA1",
734 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
736         "UMask": "0x10"
740         "Counter": "0,1,2,3",  string
741         "CounterHTOff": "0,1,2,3,4,5,6,7",
742         "EventCode": "0xA1",
744 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
746         "UMask": "0x20"
750         "Counter": "0,1,2,3",  string
751         "CounterHTOff": "0,1,2,3,4,5,6,7",
752         "EventCode": "0xA1",
754 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
756         "UMask": "0x40"
760         "Counter": "0,1,2,3",  string
761         "CounterHTOff": "0,1,2,3,4,5,6,7",
762         "EventCode": "0xA1",
764 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
766         "UMask": "0x80"
770         "Counter": "0,1,2,3",  string
771         "CounterHTOff": "0,1,2,3,4,5,6,7",
772         "EventCode": "0xB1",
776         "UMask": "0x2"
779 …    "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
780         "Counter": "0,1,2,3",  string
781         "CounterHTOff": "0,1,2,3,4,5,6,7",
783         "EventCode": "0xB1",
786         "UMask": "0x2"
789 …    "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
790         "Counter": "0,1,2,3",  string
791         "CounterHTOff": "0,1,2,3,4,5,6,7",
793         "EventCode": "0xB1",
796         "UMask": "0x2"
799 …    "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
800         "Counter": "0,1,2,3",  string
801         "CounterHTOff": "0,1,2,3,4,5,6,7",
803         "EventCode": "0xB1",
806         "UMask": "0x2"
809 …    "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
810         "Counter": "0,1,2,3",  string
811         "CounterHTOff": "0,1,2,3,4,5,6,7",
813         "EventCode": "0xB1",
816         "UMask": "0x2"
819         "BriefDescription": "Cycles with no micro-ops executed from any thread on physical core.",
820         "Counter": "0,1,2,3",  string
821         "CounterHTOff": "0,1,2,3,4,5,6,7",
823         "EventCode": "0xB1",
827         "UMask": "0x2"
830         "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
831         "Counter": "0,1,2,3",  string
832         "CounterHTOff": "0,1,2,3,4,5,6,7",
834         "EventCode": "0xB1",
836         "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",
838         "UMask": "0x1"
841         "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
842         "Counter": "0,1,2,3",  string
843         "CounterHTOff": "0,1,2,3,4,5,6,7",
845         "EventCode": "0xB1",
847         "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",
849         "UMask": "0x1"
852         "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
853         "Counter": "0,1,2,3",  string
854         "CounterHTOff": "0,1,2,3,4,5,6,7",
856         "EventCode": "0xB1",
858         "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",
860         "UMask": "0x1"
863         "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
864         "Counter": "0,1,2,3",  string
865         "CounterHTOff": "0,1,2,3,4,5,6,7",
867         "EventCode": "0xB1",
869         "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",
871         "UMask": "0x1"
875         "Counter": "0,1,2,3",  string
876         "CounterHTOff": "0,1,2,3,4,5,6,7",
878         "EventCode": "0xB1",
883         "UMask": "0x1"
886         "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
887         "Counter": "0,1,2,3",  string
888         "CounterHTOff": "0,1,2,3,4,5,6,7",
889         "EventCode": "0xB1",
891         "PublicDescription": "Number of uops to be executed per-thread each cycle.",
893         "UMask": "0x1"
897         "Counter": "0,1,2,3",  string
898         "CounterHTOff": "0,1,2,3,4,5,6,7",
899         "EventCode": "0xB1",
903         "UMask": "0x10"
907         "Counter": "0,1,2,3",  string
908         "CounterHTOff": "0,1,2,3,4,5,6,7",
909         "EventCode": "0x0E",
913         "UMask": "0x1"
917         "Counter": "0,1,2,3",  string
918         "CounterHTOff": "0,1,2,3,4,5,6,7",
919         "EventCode": "0x0E",
922         "UMask": "0x20"
926         "Counter": "0,1,2,3",  string
927         "CounterHTOff": "0,1,2,3,4,5,6,7",
929         "EventCode": "0x0E",
934         "UMask": "0x1"
937 …"BriefDescription": "Uops inserted at issue-stage in order to preserve upper bits of vector regist…
938         "Counter": "0,1,2,3",  string
939         "CounterHTOff": "0,1,2,3,4,5,6,7",
940         "EventCode": "0x0E",
942 …tel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destinatio…
944         "UMask": "0x2"
947         "BriefDescription": "Number of macro-fused uops retired. (non precise)",
948         "Counter": "0,1,2,3",  string
949         "CounterHTOff": "0,1,2,3,4,5,6,7",
950         "EventCode": "0xc2",
952         "PublicDescription": "Counts the number of macro-fused uops retired. (non precise)",
954         "UMask": "0x4"
958         "Counter": "0,1,2,3",  string
959         "CounterHTOff": "0,1,2,3,4,5,6,7",
960         "EventCode": "0xC2",
964         "UMask": "0x2"
968         "Counter": "0,1,2,3",  string
969         "CounterHTOff": "0,1,2,3,4,5,6,7",
971         "EventCode": "0xC2",
976         "UMask": "0x2"
980         "Counter": "0,1,2,3",  string
981         "CounterHTOff": "0,1,2,3,4,5,6,7",
983         "EventCode": "0xC2",
988         "UMask": "0x2"