Lines Matching +full:detector +full:- +full:enable
3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
415 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
434 …tion. For instructions that consist of multiple micro-ops, Counts the retirement of the last micro…
439 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
445 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
486 …"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path …
550 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
561 …blicDescription": "Counts the cycles when 4 uops are delivered by the LSD (Loop-stream detector).",
572 …iption": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",
582 … "PublicDescription": "Number of uops delivered to the back-end by the LSD(Loop Stream Detector).",
598 "BriefDescription": "Self-modifying code (SMC) detected.",
603 … "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
608 …"BriefDescription": "Number of times a microcode assist is invoked by HW other than FP-assist. Exa…
627 "BriefDescription": "Resource-related stall cycles",
632 "PublicDescription": "Counts resource-related stall cycles.",
642 …B) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-e…
652 …the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL …
671 …ing which the reservation station (RS) is empty for the thread.; Note: In ST-mode, not active thre…
684 …eservation Station (RS) was empty. Could be useful to precisely locate front-end Latency Bound iss…
694 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
704 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
714 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
724 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
734 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
744 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
754 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
764 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
779 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
789 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
799 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
809 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
819 "BriefDescription": "Cycles with no micro-ops executed from any thread on physical core.",
830 "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
836 "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",
841 "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
847 "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",
852 "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
858 "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",
863 "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
869 "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",
886 "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
891 "PublicDescription": "Number of uops to be executed per-thread each cycle.",
937 …"BriefDescription": "Uops inserted at issue-stage in order to preserve upper bits of vector regist…
942 …tel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destinatio…
947 "BriefDescription": "Number of macro-fused uops retired. (non precise)",
952 "PublicDescription": "Counts the number of macro-fused uops retired. (non precise)",