Lines Matching +full:counter +full:- +full:2
3 …with all the following traits: 1. addressing of the format [base + offset], 2. the offset is betwe…
4 "Counter": "0,1,2,3", string
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
13 "Counter": "0,1,2,3", string
14 "CounterHTOff": "0,1,2,3,4,5,6,7",
25 "Counter": "0,1,2,3", string
26 "CounterHTOff": "0,1,2,3,4,5,6,7",
34 "Counter": "0,1,2,3", string
35 "CounterHTOff": "0,1,2,3,4,5,6,7",
42 "BriefDescription": "Speculative and retired macro-conditional branches.",
43 "Counter": "0,1,2,3", string
44 "CounterHTOff": "0,1,2,3,4,5,6,7",
51 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
52 "Counter": "0,1,2,3", string
53 "CounterHTOff": "0,1,2,3,4,5,6,7",
61 "Counter": "0,1,2,3", string
62 "CounterHTOff": "0,1,2,3,4,5,6,7",
70 "Counter": "0,1,2,3", string
71 "CounterHTOff": "0,1,2,3,4,5,6,7",
79 "Counter": "0,1,2,3", string
80 "CounterHTOff": "0,1,2,3,4,5,6,7",
87 "BriefDescription": "Not taken macro-conditional branches.",
88 "Counter": "0,1,2,3", string
89 "CounterHTOff": "0,1,2,3,4,5,6,7",
96 "BriefDescription": "Taken speculative and retired macro-conditional branches.",
97 "Counter": "0,1,2,3", string
98 "CounterHTOff": "0,1,2,3,4,5,6,7",
105 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
106 "Counter": "0,1,2,3", string
107 "CounterHTOff": "0,1,2,3,4,5,6,7",
115 "Counter": "0,1,2,3", string
116 "CounterHTOff": "0,1,2,3,4,5,6,7",
124 "Counter": "0,1,2,3", string
125 "CounterHTOff": "0,1,2,3,4,5,6,7",
133 "Counter": "0,1,2,3", string
134 "CounterHTOff": "0,1,2,3,4,5,6,7",
142 "Counter": "0,1,2,3", string
143 "CounterHTOff": "0,1,2,3,4,5,6,7",
151 "Counter": "0,1,2,3", string
152 "CounterHTOff": "0,1,2,3,4,5,6,7",
158 "BriefDescription": "All (macro) branch instructions retired. (Precise Event - PEBS).",
159 "Counter": "0,1,2,3", string
160 "CounterHTOff": "0,1,2,3",
163 "PEBS": "2",
168 "BriefDescription": "Conditional branch instructions retired. (Precise Event - PEBS).",
169 "Counter": "0,1,2,3", string
170 "CounterHTOff": "0,1,2,3,4,5,6,7",
179 "Counter": "0,1,2,3", string
180 "CounterHTOff": "0,1,2,3,4,5,6,7",
187 … "BriefDescription": "Direct and indirect near call instructions retired. (Precise Event - PEBS).",
188 "Counter": "0,1,2,3", string
189 "CounterHTOff": "0,1,2,3,4,5,6,7",
197 …t and indirect macro near call instructions retired (captured in ring 3). (Precise Event - PEBS).",
198 "Counter": "0,1,2,3", string
199 "CounterHTOff": "0,1,2,3,4,5,6,7",
207 "BriefDescription": "Return instructions retired. (Precise Event - PEBS).",
208 "Counter": "0,1,2,3", string
209 "CounterHTOff": "0,1,2,3,4,5,6,7",
217 "BriefDescription": "Taken branch instructions retired. (Precise Event - PEBS).",
218 "Counter": "0,1,2,3", string
219 "CounterHTOff": "0,1,2,3,4,5,6,7",
228 "Counter": "0,1,2,3", string
229 "CounterHTOff": "0,1,2,3,4,5,6,7",
237 "Counter": "0,1,2,3", string
238 "CounterHTOff": "0,1,2,3,4,5,6,7",
246 "Counter": "0,1,2,3", string
247 "CounterHTOff": "0,1,2,3,4,5,6,7",
255 "Counter": "0,1,2,3", string
256 "CounterHTOff": "0,1,2,3,4,5,6,7",
264 "Counter": "0,1,2,3", string
265 "CounterHTOff": "0,1,2,3,4,5,6,7",
273 "Counter": "0,1,2,3", string
274 "CounterHTOff": "0,1,2,3,4,5,6,7",
282 "Counter": "0,1,2,3", string
283 "CounterHTOff": "0,1,2,3,4,5,6,7",
291 "Counter": "0,1,2,3", string
292 "CounterHTOff": "0,1,2,3,4,5,6,7",
300 "Counter": "0,1,2,3", string
301 "CounterHTOff": "0,1,2,3,4,5,6,7",
309 "Counter": "0,1,2,3", string
310 "CounterHTOff": "0,1,2,3,4,5,6,7",
318 "Counter": "0,1,2,3", string
319 "CounterHTOff": "0,1,2,3,4,5,6,7",
327 "Counter": "0,1,2,3", string
328 "CounterHTOff": "0,1,2,3,4,5,6,7",
334 … "BriefDescription": "Mispredicted macro branch instructions retired. (Precise Event - PEBS).",
335 "Counter": "0,1,2,3", string
336 "CounterHTOff": "0,1,2,3",
339 "PEBS": "2",
340 … "PublicDescription": "Mispredicted macro branch instructions retired. (Precise Event - PEBS)",
345 …"BriefDescription": "Mispredicted conditional branch instructions retired. (Precise Event - PEBS).…
346 "Counter": "0,1,2,3", string
347 "CounterHTOff": "0,1,2,3,4,5,6,7",
355 …ption": "Direct and indirect mispredicted near call instructions retired. (Precise Event - PEBS).",
356 "Counter": "0,1,2,3", string
357 "CounterHTOff": "0,1,2,3,4,5,6,7",
365 … "BriefDescription": "Mispredicted not taken branch instructions retired.(Precise Event - PEBS).",
366 "Counter": "0,1,2,3", string
367 "CounterHTOff": "0,1,2,3,4,5,6,7",
375 … "BriefDescription": "Mispredicted taken branch instructions retired. (Precise Event - PEBS).",
376 "Counter": "0,1,2,3", string
377 "CounterHTOff": "0,1,2,3,4,5,6,7",
386 "Counter": "0,1,2,3", string
387 "CounterHTOff": "0,1,2,3",
395 "Counter": "0,1,2,3", string
396 "CounterHTOff": "0,1,2,3,4,5,6,7",
405 "Counter": "0,1,2,3", string
406 "CounterHTOff": "0,1,2,3,4,5,6,7",
414 "Counter": "0,1,2,3", string
415 "CounterHTOff": "0,1,2,3,4,5,6,7",
423 "Counter": "Fixed counter 2", string
424 "CounterHTOff": "Fixed counter 2",
426 …counter. This event can approximate elapsed time while the core was not in a halt state. This even…
432 "Counter": "0,1,2,3", string
433 "CounterHTOff": "0,1,2,3,4,5,6,7",
443 "Counter": "0,1,2,3", string
444 "CounterHTOff": "0,1,2,3,4,5,6,7",
452 "Counter": "Fixed counter 1", string
453 "CounterHTOff": "Fixed counter 1",
455 …e the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the four…
462 "Counter": "Fixed counter 1", string
463 "CounterHTOff": "Fixed counter 1",
470 "Counter": "0,1,2,3", string
471 "CounterHTOff": "0,1,2,3,4,5,6,7",
479 "Counter": "0,1,2,3", string
480 "CounterHTOff": "0,1,2,3,4,5,6,7",
486 …miss-pending demand load this thread, increment by 1. Note this is in DCU and connected to Umask 1…
487 "Counter": "2", string
488 "CounterHTOff": "2",
489 "CounterMask": "2",
496 …"BriefDescription": "Each cycle there was a MLC-miss pending demand load this thread (i.e. Non-com…
497 "Counter": "0,1,2,3", string
498 "CounterHTOff": "0,1,2,3,4,5,6,7",
506 … no dispatch for this thread, increment by 1. Note this is connect to Umask 2. No dispatch can be …
507 "Counter": "0,1,2,3", string
508 "CounterHTOff": "0,1,2,3",
516 …-pending demand load this thread and no uops dispatched, increment by 1. Note this is in DCU and c…
517 "Counter": "2", string
518 "CounterHTOff": "2",
526 …-miss pending demand load and no uops dispatched on this thread (i.e. Non-completed valid SQ entry…
527 "Counter": "0,1,2,3", string
528 "CounterHTOff": "0,1,2,3",
537 "Counter": "0,1,2,3", string
538 "CounterHTOff": "0,1,2,3,4,5,6,7",
546 "Counter": "0,1,2,3", string
547 "CounterHTOff": "0,1,2,3,4,5,6,7",
555 "Counter": "Fixed counter 0", string
556 "CounterHTOff": "Fixed counter 0",
558 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
563 … "BriefDescription": "Number of instructions retired. General Counter - architectural event.",
564 "Counter": "0,1,2,3", string
565 "CounterHTOff": "0,1,2,3,4,5,6,7",
571 "BriefDescription": "Instructions retired. (Precise Event - PEBS).",
572 "Counter": "1", string
576 "PEBS": "2",
583 "Counter": "0,1,2,3", string
584 "CounterHTOff": "0,1,2,3,4,5,6,7",
592 "Counter": "0,1,2,3", string
593 "CounterHTOff": "0,1,2,3,4,5,6,7",
603 "Counter": "0,1,2,3", string
604 "CounterHTOff": "0,1,2,3,4,5,6,7",
613 "Counter": "0,1,2,3", string
614 "CounterHTOff": "0,1,2,3,4,5,6,7",
623 …"BriefDescription": "Number of cases where any load ends up with a valid block-code written to the…
624 "Counter": "0,1,2,3", string
625 "CounterHTOff": "0,1,2,3,4,5,6,7",
633 "Counter": "0,1,2,3", string
634 "CounterHTOff": "0,1,2,3,4,5,6,7",
642 "Counter": "0,1,2,3", string
643 "CounterHTOff": "0,1,2,3,4,5,6,7",
650 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
651 "Counter": "0,1,2,3", string
652 "CounterHTOff": "0,1,2,3,4,5,6,7",
655 …store. See the table of not supported store forwards in the Intel 64 and IA-32 Architectures Opti…
661 "Counter": "0,1,2,3", string
662 "CounterHTOff": "0,1,2,3,4,5,6,7",
671 "Counter": "0,1,2,3", string
672 "CounterHTOff": "0,1,2,3,4,5,6,7",
679 …"BriefDescription": "Not software-prefetch load dispatches that hit FB allocated for hardware pref…
680 "Counter": "0,1,2,3", string
681 "CounterHTOff": "0,1,2,3,4,5,6,7",
688 …"BriefDescription": "Not software-prefetch load dispatches that hit FB allocated for software pref…
689 "Counter": "0,1,2,3", string
690 "CounterHTOff": "0,1,2,3,4,5,6,7",
698 "Counter": "0,1,2,3", string
699 "CounterHTOff": "0,1,2,3,4,5,6,7",
708 "Counter": "0,1,2,3", string
709 "CounterHTOff": "0,1,2,3,4,5,6,7",
718 "Counter": "0,1,2,3", string
719 "CounterHTOff": "0,1,2,3,4,5,6,7",
727 "Counter": "0,1,2,3", string
728 "CounterHTOff": "0,1,2,3,4,5,6,7",
738 "Counter": "0,1,2,3", string
739 "CounterHTOff": "0,1,2,3,4,5,6,7",
742 …"PublicDescription": "Maskmov false fault - counts number of time ucode passes through Maskmov flo…
747 "BriefDescription": "Self-modifying code (SMC) detected.",
748 "Counter": "0,1,2,3", string
749 "CounterHTOff": "0,1,2,3,4,5,6,7",
752 …"PublicDescription": "This event is incremented when self-modifying code (SMC) is detected, which …
758 "Counter": "0,1,2,3", string
759 "CounterHTOff": "0,1,2,3,4,5,6,7",
766 "BriefDescription": "Increments the number of flags-merge uops in flight each cycle.",
767 "Counter": "0,1,2,3", string
768 "CounterHTOff": "0,1,2,3,4,5,6,7",
775 … "BriefDescription": "Performance sensitive flags-merging uops added by Sandy Bridge u-arch.",
776 "Counter": "0,1,2,3", string
777 "CounterHTOff": "0,1,2,3,4,5,6,7",
781 …cuting performance-sensitive flags-merging uops. For example, shift CL (merge_arith_flags). For mo…
787 "Counter": "0,1,2,3", string
788 "CounterHTOff": "0,1,2,3,4,5,6,7",
796 "Counter": "0,1,2,3", string
797 "CounterHTOff": "0,1,2,3,4,5,6,7",
800 …, where base is EBR/RBP/R13, using RIP relative or 16-bit addressing modes. See the Intel 64 and I…
805 "BriefDescription": "Resource-related stall cycles.",
806 "Counter": "0,1,2,3", string
807 "CounterHTOff": "0,1,2,3,4,5,6,7",
815 "Counter": "0,1,2,3", string
816 "CounterHTOff": "0,1,2,3,4,5,6,7",
824 "Counter": "0,1,2,3", string
825 "CounterHTOff": "0,1,2,3,4,5,6,7",
833 "Counter": "0,1,2,3", string
834 "CounterHTOff": "0,1,2,3,4,5,6,7",
842 "Counter": "0,1,2,3", string
843 "CounterHTOff": "0,1,2,3,4,5,6,7",
850 "BriefDescription": "Cycles stalled due to re-order buffer full.",
851 "Counter": "0,1,2,3", string
852 "CounterHTOff": "0,1,2,3,4,5,6,7",
860 "Counter": "0,1,2,3", string
861 "CounterHTOff": "0,1,2,3,4,5,6,7",
869 "Counter": "0,1,2,3", string
870 "CounterHTOff": "0,1,2,3,4,5,6,7",
878 "Counter": "0,1,2,3", string
879 "CounterHTOff": "0,1,2,3,4,5,6,7",
887 "Counter": "0,1,2,3", string
888 "CounterHTOff": "0,1,2,3,4,5,6,7",
896 "Counter": "0,1,2,3", string
897 "CounterHTOff": "0,1,2,3,4,5,6,7",
905 "Counter": "0,1,2,3", string
906 "CounterHTOff": "0,1,2,3,4,5,6,7",
914 "Counter": "0,1,2,3", string
915 "CounterHTOff": "0,1,2,3,4,5,6,7",
923 "Counter": "0,1,2,3", string
924 "CounterHTOff": "0,1,2,3,4,5,6,7",
932 "Counter": "0,1,2,3", string
933 "CounterHTOff": "0,1,2,3,4,5,6,7",
944 "Counter": "0,1,2,3", string
945 "CounterHTOff": "0,1,2,3,4,5,6,7",
953 "Counter": "0,1,2,3", string
954 "CounterHTOff": "0,1,2,3,4,5,6,7",
962 "Counter": "0,1,2,3", string
963 "CounterHTOff": "0,1,2,3,4,5,6,7",
972 "Counter": "0,1,2,3", string
973 "CounterHTOff": "0,1,2,3,4,5,6,7",
981 "Counter": "0,1,2,3", string
982 "CounterHTOff": "0,1,2,3,4,5,6,7",
991 "Counter": "0,1,2,3", string
992 "CounterHTOff": "0,1,2,3,4,5,6,7",
999 "BriefDescription": "Cycles per thread when load or STA uops are dispatched to port 2.",
1000 "Counter": "0,1,2,3", string
1001 "CounterHTOff": "0,1,2,3,4,5,6,7",
1009 "BriefDescription": "Cycles per core when load or STA uops are dispatched to port 2.",
1010 "Counter": "0,1,2,3", string
1011 "CounterHTOff": "0,1,2,3,4,5,6,7",
1019 "Counter": "0,1,2,3", string
1020 "CounterHTOff": "0,1,2,3,4,5,6,7",
1029 "Counter": "0,1,2,3", string
1030 "CounterHTOff": "0,1,2,3,4,5,6,7",
1038 "Counter": "0,1,2,3", string
1039 "CounterHTOff": "0,1,2,3,4,5,6,7",
1048 "Counter": "0,1,2,3", string
1049 "CounterHTOff": "0,1,2,3,4,5,6,7",
1057 "Counter": "0,1,2,3", string
1058 "CounterHTOff": "0,1,2,3,4,5,6,7",
1067 "Counter": "0,1,2,3", string
1068 "CounterHTOff": "0,1,2,3,4,5,6,7",
1075 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
1076 "Counter": "0,1,2,3", string
1077 "CounterHTOff": "0,1,2,3,4,5,6,7",
1085 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
1086 "Counter": "0,1,2,3", string
1087 "CounterHTOff": "0,1,2,3,4,5,6,7",
1088 "CounterMask": "2",
1095 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
1096 "Counter": "0,1,2,3", string
1097 "CounterHTOff": "0,1,2,3,4,5,6,7",
1105 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
1106 "Counter": "0,1,2,3", string
1107 "CounterHTOff": "0,1,2,3,4,5,6,7",
1115 "BriefDescription": "Cycles with no micro-ops executed from any thread on physical core.",
1116 "Counter": "0,1,2,3", string
1117 "CounterHTOff": "0,1,2,3,4,5,6,7",
1126 "Counter": "0,1,2,3", string
1127 "CounterHTOff": "0,1,2,3,4,5,6,7",
1130 …": "This event counts the number of Uops issued by the front-end of the pipeilne to the back-end.",
1137 "Counter": "0,1,2,3", string
1138 "CounterHTOff": "0,1,2,3",
1148 "Counter": "0,1,2,3", string
1149 "CounterHTOff": "0,1,2,3",
1158 "BriefDescription": "Actually retired uops. (Precise Event - PEBS).",
1159 "Counter": "0,1,2,3", string
1160 "CounterHTOff": "0,1,2,3,4,5,6,7",
1164 "PublicDescription": "This event counts the number of micro-ops retired. (Precise Event)",
1170 "Counter": "0,1,2,3", string
1171 "CounterHTOff": "0,1,2,3",
1180 "BriefDescription": "Retirement slots used. (Precise Event - PEBS).",
1181 "Counter": "0,1,2,3", string
1182 "CounterHTOff": "0,1,2,3,4,5,6,7",
1186 …- meaning, 4 micro-ops or 4 instructions could retire each cycle. This event is used in determini…
1192 "Counter": "0,1,2,3", string
1193 "CounterHTOff": "0,1,2,3",
1203 "Counter": "0,1,2,3", string
1204 "CounterHTOff": "0,1,2,3",