Lines Matching +full:cycle +full:- +full:3
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3",
15 "Counter": "0,1,2,3",
16 "CounterHTOff": "0,1,2,3,4,5,6,7",
25 "Counter": "0,1,2,3",
26 "CounterHTOff": "0,1,2,3,4,5,6,7",
35 "Counter": "0,1,2,3",
36 "CounterHTOff": "0,1,2,3,4,5,6,7",
45 "Counter": "0,1,2,3",
46 "CounterHTOff": "0,1,2,3,4,5,6,7",
54 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue…
55 "Counter": "0,1,2,3",
56 "CounterHTOff": "0,1,2,3,4,5,6,7",
59 …PublicDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue…
64 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue…
65 "Counter": "0,1,2,3",
66 "CounterHTOff": "0,1,2,3,4,5,6,7",
69 …PublicDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue…
74 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issue…
75 "Counter": "0,1,2,3",
76 "CounterHTOff": "0,1,2,3,4,5,6,7",
79 … "PublicDescription": "Counts number of SSE* or AVX-128 double precision FP scalar uops executed.",
84 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue…
85 "Counter": "0,1,2,3",
86 "CounterHTOff": "0,1,2,3,4,5,6,7",
89 …PublicDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue…
94 …"BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB…
95 "Counter": "0,1,2,3",
96 "CounterHTOff": "0,1,2,3,4,5,6,7",
105 "Counter": "0,1,2,3",
106 "CounterHTOff": "0,1,2,3,4,5,6,7",
114 "Counter": "0,1,2,3",
115 "CounterHTOff": "0,1,2,3,4,5,6,7",
122 … assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.",
123 "Counter": "0,1,2,3",
124 "CounterHTOff": "0,1,2,3,4,5,6,7",
127 "PublicDescription": "Number of assists associated with 256-bit AVX store operations.",
132 … "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
133 "Counter": "0,1,2,3",
134 "CounterHTOff": "0,1,2,3,4,5,6,7",
141 "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
142 "Counter": "0,1,2,3",
143 "CounterHTOff": "0,1,2,3,4,5,6,7",
150 … "BriefDescription": "number of AVX-256 Computational FP double precision uops issued this cycle",
151 "Counter": "0,1,2,3",
152 "CounterHTOff": "0,1,2,3,4,5,6,7",
155 "PublicDescription": "Counts 256-bit packed double-precision floating-point instructions.",
160 … "BriefDescription": "number of GSSE-256 Computational FP single precision uops issued this cycle",
161 "Counter": "0,1,2,3",
162 "CounterHTOff": "0,1,2,3,4,5,6,7",
165 "PublicDescription": "Counts 256-bit packed single-precision floating-point instructions.",