Lines Matching +full:counter +full:- +full:2

4         "CollectPEBSRecord": "2",
5 "Counter": "0,1,2,3,4,5,6,7", string
9 "PEBScounters": "0,1,2,3,4,5,6,7",
10 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
17 "CollectPEBSRecord": "2",
18 "Counter": "0,1,2,3,4,5,6,7", string
21 "PEBScounters": "0,1,2,3,4,5,6,7",
29 "CollectPEBSRecord": "2",
30 "Counter": "0,1,2,3,4,5,6,7", string
34 "PEBScounters": "0,1,2,3,4,5,6,7",
40 "CollectPEBSRecord": "2",
41 "Counter": "0,1,2,3,4,5,6,7", string
45 "PEBScounters": "0,1,2,3,4,5,6,7",
52 "CollectPEBSRecord": "2",
53 "Counter": "0,1,2,3,4,5,6,7", string
57 "PEBScounters": "0,1,2,3,4,5,6,7",
64 "CollectPEBSRecord": "2",
65 "Counter": "0,1,2,3,4,5,6,7", string
69 "PEBScounters": "0,1,2,3,4,5,6,7",
76 "CollectPEBSRecord": "2",
77 "Counter": "0,1,2,3,4,5,6,7", string
81 "PEBScounters": "0,1,2,3,4,5,6,7",
88 "CollectPEBSRecord": "2",
89 "Counter": "0,1,2,3,4,5,6,7", string
93 "PEBScounters": "0,1,2,3,4,5,6,7",
100 "CollectPEBSRecord": "2",
101 "Counter": "0,1,2,3,4,5,6,7", string
105 "PEBScounters": "0,1,2,3,4,5,6,7",
112 "CollectPEBSRecord": "2",
113 "Counter": "0,1,2,3,4,5,6,7", string
117 "PEBScounters": "0,1,2,3,4,5,6,7",
124 "CollectPEBSRecord": "2",
125 "Counter": "0,1,2,3,4,5,6,7", string
129 "PEBScounters": "0,1,2,3,4,5,6,7",
136 "CollectPEBSRecord": "2",
137 "Counter": "0,1,2,3,4,5,6,7", string
141 "PEBScounters": "0,1,2,3,4,5,6,7",
147 "CollectPEBSRecord": "2",
148 "Counter": "0,1,2,3,4,5,6,7", string
152 "PEBScounters": "0,1,2,3,4,5,6,7",
158 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
159 "CollectPEBSRecord": "2",
160 "Counter": "0,1,2,3,4,5,6,7", string
164 "PEBScounters": "0,1,2,3,4,5,6,7",
171 "CollectPEBSRecord": "2",
172 "Counter": "0,1,2,3,4,5,6,7", string
176 "PEBScounters": "0,1,2,3,4,5,6,7",
182 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
183 "CollectPEBSRecord": "2",
184 "Counter": "0,1,2,3,4,5,6,7", string
188 "PEBScounters": "0,1,2,3,4,5,6,7",
189 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
195 "CollectPEBSRecord": "2",
196 "Counter": "0,1,2,3,4,5,6,7", string
200 "PEBScounters": "0,1,2,3,4,5,6,7",
207 "CollectPEBSRecord": "2",
208 "Counter": "0,1,2,3,4,5,6,7", string
212 "PEBScounters": "0,1,2,3,4,5,6,7",
219 "CollectPEBSRecord": "2",
220 "Counter": "0,1,2,3,4,5,6,7", string
223 "PEBScounters": "0,1,2,3,4,5,6,7",
231 "CollectPEBSRecord": "2",
232 "Counter": "0,1,2,3,4,5,6,7", string
235 "PEBScounters": "0,1,2,3,4,5,6,7",
243 "CollectPEBSRecord": "2",
244 "Counter": "0,1,2,3,4,5,6,7", string
247 "PEBScounters": "0,1,2,3,4,5,6,7",
248 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
255 "CollectPEBSRecord": "2",
256 "Counter": "Fixed counter 2", string
259counter. This event can approximate elapsed time while the core was not in a halt state. This even…
266 "CollectPEBSRecord": "2",
267 "Counter": "0,1,2,3,4,5,6,7", string
270 "PEBScounters": "0,1,2,3,4,5,6,7",
278 "CollectPEBSRecord": "2",
279 "Counter": "Fixed counter 1", string
282 …e the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eigh…
289 "CollectPEBSRecord": "2",
290 "Counter": "0,1,2,3,4,5,6,7", string
293 "PEBScounters": "0,1,2,3,4,5,6,7",
300 "CollectPEBSRecord": "2",
301 "Counter": "0,1,2,3", string
305 "PEBScounters": "0,1,2,3",
312 "CollectPEBSRecord": "2",
313 "Counter": "0,1,2,3", string
317 "PEBScounters": "0,1,2,3",
324 "CollectPEBSRecord": "2",
325 "Counter": "0,1,2,3,4,5,6,7", string
329 "PEBScounters": "0,1,2,3,4,5,6,7",
336 "CollectPEBSRecord": "2",
337 "Counter": "0,1,2,3", string
341 "PEBScounters": "0,1,2,3",
348 "CollectPEBSRecord": "2",
349 "Counter": "0,1,2,3", string
353 "PEBScounters": "0,1,2,3",
360 "CollectPEBSRecord": "2",
361 "Counter": "0,1,2,3,4,5,6,7", string
365 "PEBScounters": "0,1,2,3,4,5,6,7",
372 "CollectPEBSRecord": "2",
373 "Counter": "0,1,2,3,4,5,6,7", string
377 "PEBScounters": "0,1,2,3,4,5,6,7",
384 "CollectPEBSRecord": "2",
385 "Counter": "0,1,2,3,4,5,6,7", string
388 "PEBScounters": "0,1,2,3,4,5,6,7",
395 …"BriefDescription": "Cycles total of 2 uops are executed on all ports and Reservation Station was …
396 "CollectPEBSRecord": "2",
397 "Counter": "0,1,2,3,4,5,6,7", string
399 "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",
400 "PEBScounters": "0,1,2,3,4,5,6,7",
401 …"PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and …
408 "CollectPEBSRecord": "2",
409 "Counter": "0,1,2,3,4,5,6,7", string
412 "PEBScounters": "0,1,2,3,4,5,6,7",
420 "CollectPEBSRecord": "2",
421 "Counter": "0,1,2,3,4,5,6,7", string
424 "PEBScounters": "0,1,2,3,4,5,6,7",
432 "CollectPEBSRecord": "2",
433 "Counter": "0,1,2,3,4,5,6,7", string
434 "CounterMask": "2",
437 "PEBScounters": "0,1,2,3,4,5,6,7",
445 "CollectPEBSRecord": "2",
446 "Counter": "0,1,2,3", string
449 "PEBScounters": "0,1,2,3",
450 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
457 "CollectPEBSRecord": "2",
458 "Counter": "0,1,2,3", string
461 "PEBScounters": "0,1,2,3",
468 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
469 "CollectPEBSRecord": "2",
470 "Counter": "Fixed counter 0", string
474- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
479 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
480 "CollectPEBSRecord": "2",
481 "Counter": "0,1,2,3,4,5,6,7", string
485 "PEBScounters": "0,1,2,3,4,5,6,7",
486- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
491 "CollectPEBSRecord": "2",
492 "Counter": "0,1,2,3,4,5,6,7", string
496 "PEBScounters": "0,1,2,3,4,5,6,7",
502 "CollectPEBSRecord": "2",
503 "Counter": "Fixed counter 0", string
507 …R) feature to mitigate some bias in how retired instructions get sampled. Use on Fixed Counter 0.",
513 "CollectPEBSRecord": "2",
514 "Counter": "0,1,2,3,4,5,6,7", string
519 "PEBScounters": "0,1,2,3,4,5,6,7",
526 …"BriefDescription": "Cycles the Backend cluster is recovering after a miss-speculation or a Store …
527 "CollectPEBSRecord": "2",
528 "Counter": "0,1,2,3,4,5,6,7", string
532 "PEBScounters": "0,1,2,3,4,5,6,7",
533 …"PublicDescription": "Counts cycles the Backend cluster is recovering after a miss-speculation or …
540 "CollectPEBSRecord": "2",
541 "Counter": "0,1,2,3,4,5,6,7", string
544 "PEBScounters": "0,1,2,3,4,5,6,7",
552 "CollectPEBSRecord": "2",
553 "Counter": "0,1,2,3,4,5,6,7", string
556 "PEBScounters": "0,1,2,3,4,5,6,7",
564 "CollectPEBSRecord": "2",
565 "Counter": "0,1,2,3,4,5,6,7", string
568 "PEBScounters": "0,1,2,3,4,5,6,7",
569 …icDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped du…
576 "CollectPEBSRecord": "2",
577 "Counter": "0,1,2,3", string
580 "PEBScounters": "0,1,2,3",
588 "CollectPEBSRecord": "2",
589 "Counter": "0,1,2,3", string
592 "PEBScounters": "0,1,2,3",
600 "CollectPEBSRecord": "2",
601 "Counter": "0,1,2,3", string
604 "PEBScounters": "0,1,2,3",
612 "CollectPEBSRecord": "2",
613 "Counter": "0,1,2,3", string
616 "PEBScounters": "0,1,2,3",
617 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
624 "CollectPEBSRecord": "2",
625 "Counter": "0,1,2,3", string
629 "PEBScounters": "0,1,2,3",
630 …iption": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",
637 "CollectPEBSRecord": "2",
638 "Counter": "0,1,2,3", string
642 "PEBScounters": "0,1,2,3",
643 …": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",
650 "CollectPEBSRecord": "2",
651 "Counter": "0,1,2,3", string
654 "PEBScounters": "0,1,2,3",
655 …"PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream D…
662 "CollectPEBSRecord": "2",
663 "Counter": "0,1,2,3,4,5,6,7", string
668 "PEBScounters": "0,1,2,3,4,5,6,7",
675 "BriefDescription": "Self-modifying code (SMC) detected.",
676 "CollectPEBSRecord": "2",
677 "Counter": "0,1,2,3,4,5,6,7", string
680 "PEBScounters": "0,1,2,3,4,5,6,7",
681 … "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
688 "CollectPEBSRecord": "2",
689 "Counter": "0,1,2,3,4,5,6,7", string
692 "PEBScounters": "0,1,2,3,4,5,6,7",
699 "CollectPEBSRecord": "2",
700 "Counter": "0,1,2,3,4,5,6,7", string
709 "CollectPEBSRecord": "2",
710 "Counter": "0,1,2,3,4,5,6,7", string
713 "PEBScounters": "0,1,2,3,4,5,6,7",
714 …B) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-e…
721 "CollectPEBSRecord": "2",
722 "Counter": "0,1,2,3,4,5,6,7", string
725 "PEBScounters": "0,1,2,3,4,5,6,7",
732 "CollectPEBSRecord": "2",
733 "Counter": "0,1,2,3,4,5,6,7", string
736 "PEBScounters": "0,1,2,3,4,5,6,7",
737 … This is usually caused when the front-end pipeline runs into stravation periods (e.g. branch misp…
744 "CollectPEBSRecord": "2",
745 "Counter": "0,1,2,3,4,5,6,7", string
751 "PEBScounters": "0,1,2,3,4,5,6,7",
752 …servation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (s…
758 …"BriefDescription": "TMA slots where no uops were being issued due to lack of back-end resources.",
759 "CollectPEBSRecord": "2",
760 "Counter": "0,1,2,3,4,5,6,7", string
763 "PEBScounters": "0,1,2,3,4,5,6,7",
764-down Microarchitecture Analysis (TMA) method's slots where no micro-operations were being issued…
771 "CollectPEBSRecord": "2",
772 "Counter": "0,1,2,3,4,5,6,7", string
775 "PEBScounters": "0,1,2,3,4,5,6,7",
776 …t were issued but not retired from the specualtive path as well as the out-of-order engine recover…
782 …"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - archit…
783 "CollectPEBSRecord": "2",
784 "Counter": "Fixed counter 3", string
787-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TM…
793 …ption": "TMA slots available for an unhalted logical processor. General counter - architectural ev…
794 "CollectPEBSRecord": "2",
795 "Counter": "0,1,2,3,4,5,6,7", string
798 "PEBScounters": "0,1,2,3,4,5,6,7",
799-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. Th…
806 "CollectPEBSRecord": "2",
807 "Counter": "0,1,2,3", string
810 "PEBScounters": "0,1,2,3",
818 "CollectPEBSRecord": "2",
819 "Counter": "0,1,2,3,4,5,6,7", string
822 "PEBScounters": "0,1,2,3,4,5,6,7",
823 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
830 "CollectPEBSRecord": "2",
831 "Counter": "0,1,2,3,4,5,6,7", string
834 "PEBScounters": "0,1,2,3,4,5,6,7",
835 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
841 "BriefDescription": "Number of uops executed on port 2 and 3",
842 "CollectPEBSRecord": "2",
843 "Counter": "0,1,2,3,4,5,6,7", string
846 "PEBScounters": "0,1,2,3,4,5,6,7",
847 …: "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Re…
854 "CollectPEBSRecord": "2",
855 "Counter": "0,1,2,3,4,5,6,7", string
858 "PEBScounters": "0,1,2,3,4,5,6,7",
859 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
866 "CollectPEBSRecord": "2",
867 "Counter": "0,1,2,3,4,5,6,7", string
870 "PEBScounters": "0,1,2,3,4,5,6,7",
871 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
878 "CollectPEBSRecord": "2",
879 "Counter": "0,1,2,3,4,5,6,7", string
882 "PEBScounters": "0,1,2,3,4,5,6,7",
883 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
890 "CollectPEBSRecord": "2",
891 "Counter": "0,1,2,3,4,5,6,7", string
894 "PEBScounters": "0,1,2,3,4,5,6,7",
895 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
902 "CollectPEBSRecord": "2",
903 "Counter": "0,1,2,3,4,5,6,7", string
906 "PEBScounters": "0,1,2,3,4,5,6,7",
913 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
914 "CollectPEBSRecord": "2",
915 "Counter": "0,1,2,3,4,5,6,7", string
919 "PEBScounters": "0,1,2,3,4,5,6,7",
920 …"PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physic…
926 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
927 "CollectPEBSRecord": "2",
928 "Counter": "0,1,2,3,4,5,6,7", string
929 "CounterMask": "2",
932 "PEBScounters": "0,1,2,3,4,5,6,7",
933 …"PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on phys…
939 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
940 "CollectPEBSRecord": "2",
941 "Counter": "0,1,2,3,4,5,6,7", string
945 "PEBScounters": "0,1,2,3,4,5,6,7",
946 …"PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on phys…
952 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
953 "CollectPEBSRecord": "2",
954 "Counter": "0,1,2,3,4,5,6,7", string
958 "PEBScounters": "0,1,2,3,4,5,6,7",
959 …"PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on phys…
965 "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
966 "CollectPEBSRecord": "2",
967 "Counter": "0,1,2,3,4,5,6,7", string
971 "PEBScounters": "0,1,2,3,4,5,6,7",
972 "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",
978 "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
979 "CollectPEBSRecord": "2",
980 "Counter": "0,1,2,3,4,5,6,7", string
981 "CounterMask": "2",
984 "PEBScounters": "0,1,2,3,4,5,6,7",
985 "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",
991 "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
992 "CollectPEBSRecord": "2",
993 "Counter": "0,1,2,3,4,5,6,7", string
997 "PEBScounters": "0,1,2,3,4,5,6,7",
998 "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",
1004 "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
1005 "CollectPEBSRecord": "2",
1006 "Counter": "0,1,2,3,4,5,6,7", string
1010 "PEBScounters": "0,1,2,3,4,5,6,7",
1011 "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",
1018 "CollectPEBSRecord": "2",
1019 "Counter": "0,1,2,3,4,5,6,7", string
1024 "PEBScounters": "0,1,2,3,4,5,6,7",
1031 "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
1032 "CollectPEBSRecord": "2",
1033 "Counter": "0,1,2,3,4,5,6,7", string
1036 "PEBScounters": "0,1,2,3,4,5,6,7",
1043 "CollectPEBSRecord": "2",
1044 "Counter": "0,1,2,3,4,5,6,7", string
1047 "PEBScounters": "0,1,2,3,4,5,6,7",
1055 "CollectPEBSRecord": "2",
1056 "Counter": "0,1,2,3,4,5,6,7", string
1059 "PEBScounters": "0,1,2,3,4,5,6,7",
1067 "CollectPEBSRecord": "2",
1068 "Counter": "0,1,2,3,4,5,6,7", string
1073 "PEBScounters": "0,1,2,3,4,5,6,7",
1080 …"BriefDescription": "Uops inserted at issue-stage in order to preserve upper bits of vector regist…
1081 "CollectPEBSRecord": "2",
1082 "Counter": "0,1,2,3,4,5,6,7", string
1085 "PEBScounters": "0,1,2,3,4,5,6,7",
1086 …tel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destinatio…
1093 "CollectPEBSRecord": "2",
1094 "Counter": "0,1,2,3,4,5,6,7", string
1097 "PEBScounters": "0,1,2,3,4,5,6,7",
1104 "CollectPEBSRecord": "2",
1105 "Counter": "0,1,2,3,4,5,6,7", string
1110 "PEBScounters": "0,1,2,3,4,5,6,7",
1118 "CollectPEBSRecord": "2",
1119 "Counter": "0,1,2,3,4,5,6,7", string
1124 "PEBScounters": "0,1,2,3,4,5,6,7",