Lines Matching +full:cycle +full:- +full:6

5         "CounterHTOff": "0,1,2,3,4,5,6,7",
8         "PublicDescription": "Number of front end re-steers due to BPU misprediction.",
13         "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
15         "CounterHTOff": "0,1,2,3,4,5,6,7",
24         "CounterHTOff": "0,1,2,3,4,5,6,7",
31 …      "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
33         "CounterHTOff": "0,1,2,3,4,5,6,7",
40 …      "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
42         "CounterHTOff": "0,1,2,3,4,5,6,7",
51         "CounterHTOff": "0,1,2,3,4,5,6,7",
61         "CounterHTOff": "0,1,2,3,4,5,6,7",
72         "CounterHTOff": "0,1,2,3,4,5,6,7",
83         "CounterHTOff": "0,1,2,3,4,5,6,7",
94         "CounterHTOff": "0,1,2,3,4,5,6,7",
105         "CounterHTOff": "0,1,2,3,4,5,6,7",
115         "CounterHTOff": "0,1,2,3,4,5,6,7",
118 …"PublicDescription": "Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = …
136         "CounterHTOff": "0,1,2,3,4,5,6,7",
146         "CounterHTOff": "0,1,2,3,4,5,6,7",
156         "CounterHTOff": "0,1,2,3,4,5,6,7",
159 …"PublicDescription": "Increment each cycle # of uops delivered to IDQ from MITE path. Set Cmask = …
166         "CounterHTOff": "0,1,2,3,4,5,6,7",
170 … event counts cycles during which the microcode sequencer assisted the Front-end in delivering uop…
177         "CounterHTOff": "0,1,2,3,4,5,6,7",
187         "CounterHTOff": "0,1,2,3,4,5,6,7",
198         "CounterHTOff": "0,1,2,3,4,5,6,7",
201 …"PublicDescription": "Increment each cycle # of uops delivered to IDQ when MS_busy by DSB. Set Cma…
208         "CounterHTOff": "0,1,2,3,4,5,6,7",
211 …"PublicDescription": "Increment each cycle # of uops delivered to IDQ when MS_busy by MITE. Set Cm…
218         "CounterHTOff": "0,1,2,3,4,5,6,7",
229         "CounterHTOff": "0,1,2,3,4,5,6,7",
232 …"PublicDescription": "This event counts uops delivered by the Front-end with the assistance of the…
243 …-end to the Resource Allocation Table (RAT) while the Back-end of the processor is not stalled. Th…
255 …-end allocated exactly zero uops to the Resource Allocation Table (RAT) while the Back-end of the …