Lines Matching full:hit
68 …ive loads are ignored. A memory load can hit (or miss) the L1 cache, hit (or miss) the L2 cache, …
85 "BriefDescription": "Load uops retired that hit L1 data cache (Precise event capable)",
92 "PublicDescription": "Counts load uops retired that hit the L1 data cache.",
109 "BriefDescription": "Load uops retired that hit L2 (Precise event capable)",
116 "PublicDescription": "Counts load uops retired that hit in the L2 cache.",
133 "BriefDescription": "Loads retired that hit WCB (Precise event capable)",
140 …ess of requesting the data. When load Y requests the data, it will either hit the WCB, or the L1 …
238 "BriefDescription": "Counts data reads (demand & prefetch) that hit the L2 cache.",
246 …"PublicDescription": "Counts data reads (demand & prefetch) that hit the L2 cache. Requires MSR_OF…
264 …"Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
272 …"Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
277 …"Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
285 …"Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
303 … "BriefDescription": "Counts data reads generated by L1 or L2 prefetchers that hit the L2 cache.",
311 …"PublicDescription": "Counts data reads generated by L1 or L2 prefetchers that hit the L2 cache. R…
329 …eads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other proces…
337 …eads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other proces…
342 …eads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other proces…
350 …eads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other proces…
368 …read, code read, and read for ownership (RFO) requests (demand & prefetch) that hit the L2 cache.",
376 … code read, and read for ownership (RFO) requests (demand & prefetch) that hit the L2 cache. Requi…
394 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
402 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
407 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
415 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
446 "BriefDescription": "Counts requests to the uncore subsystem that hit the L2 cache.",
454 …"PublicDescription": "Counts requests to the uncore subsystem that hit the L2 cache. Requires MSR_…
459 …ounts requests to the uncore subsystem that miss the L2 cache with a snoop hit in the other proces…
467 …ounts requests to the uncore subsystem that miss the L2 cache with a snoop hit in the other proces…
472 …ounts requests to the uncore subsystem that miss the L2 cache with a snoop hit in the other proces…
480 …ounts requests to the uncore subsystem that miss the L2 cache with a snoop hit in the other proces…
498 …"BriefDescription": "Counts reads for ownership (RFO) requests (demand & prefetch) that hit the L2…
506 …tion": "Counts reads for ownership (RFO) requests (demand & prefetch) that hit the L2 cache. Requi…
524 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
532 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
537 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
545 …hip (RFO) requests (demand & prefetch) that miss the L2 cache with a snoop hit in the other proces…
576 …ts the number of writeback transactions caused by L1 or L2 cache evictions that hit the L2 cache.",
584 …e number of writeback transactions caused by L1 or L2 cache evictions that hit the L2 cache. Requi…
602 …ons caused by L1 or L2 cache evictions that miss the L2 cache with a snoop hit in the other proces…
610 …ons caused by L1 or L2 cache evictions that miss the L2 cache with a snoop hit in the other proces…
615 …ons caused by L1 or L2 cache evictions that miss the L2 cache with a snoop hit in the other proces…
623 …ons caused by L1 or L2 cache evictions that miss the L2 cache with a snoop hit in the other proces…
641 …ion cacheline and I-side prefetch requests that miss the instruction cache that hit the L2 cache.",
649 …acheline and I-side prefetch requests that miss the instruction cache that hit the L2 cache. Requi…
667 …quests that miss the instruction cache that miss the L2 cache with a snoop hit in the other proces…
675 …quests that miss the instruction cache that miss the L2 cache with a snoop hit in the other proces…
706 …"BriefDescription": "Counts demand cacheable data reads of full cache lines that hit the L2 cache.…
714 …"PublicDescription": "Counts demand cacheable data reads of full cache lines that hit the L2 cache…
732 …cheable data reads of full cache lines that miss the L2 cache with a snoop hit in the other proces…
740 …cheable data reads of full cache lines that miss the L2 cache with a snoop hit in the other proces…
745 …cheable data reads of full cache lines that miss the L2 cache with a snoop hit in the other proces…
753 …cheable data reads of full cache lines that miss the L2 cache with a snoop hit in the other proces…
784 … for ownership (RFO) requests generated by a write to full data cache line that hit the L2 cache.",
792 …ownership (RFO) requests generated by a write to full data cache line that hit the L2 cache. Requi…
810 …ted by a write to full data cache line that miss the L2 cache with a snoop hit in the other proces…
818 …ted by a write to full data cache line that miss the L2 cache with a snoop hit in the other proces…
823 …ted by a write to full data cache line that miss the L2 cache with a snoop hit in the other proces…
831 …ted by a write to full data cache line that miss the L2 cache with a snoop hit in the other proces…
862 …ite combining (USWC) memory region and full cache-line non-temporal writes that hit the L2 cache.",
870 …ombining (USWC) memory region and full cache-line non-temporal writes that hit the L2 cache. Requi…
888 …nd full cache-line non-temporal writes that miss the L2 cache with a snoop hit in the other proces…
896 …nd full cache-line non-temporal writes that miss the L2 cache with a snoop hit in the other proces…
901 …nd full cache-line non-temporal writes that miss the L2 cache with a snoop hit in the other proces…
909 …nd full cache-line non-temporal writes that miss the L2 cache with a snoop hit in the other proces…
940 …ache line data writes to uncacheable write combining (USWC) memory region that hit the L2 cache.",
948 …line data writes to uncacheable write combining (USWC) memory region that hit the L2 cache. Requi…
966 … write combining (USWC) memory region that miss the L2 cache with a snoop hit in the other proces…
974 … write combining (USWC) memory region that miss the L2 cache with a snoop hit in the other proces…
979 … write combining (USWC) memory region that miss the L2 cache with a snoop hit in the other proces…
987 … write combining (USWC) memory region that miss the L2 cache with a snoop hit in the other proces…
1018 …ounts data cache line reads generated by hardware L1 data cache prefetcher that hit the L2 cache.",
1026 … data cache line reads generated by hardware L1 data cache prefetcher that hit the L2 cache. Requi…
1044 …d by hardware L1 data cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1052 …d by hardware L1 data cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1057 …d by hardware L1 data cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1065 …d by hardware L1 data cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1083 …n": "Counts data cacheline reads generated by hardware L2 cache prefetcher that hit the L2 cache.",
1091 …Counts data cacheline reads generated by hardware L2 cache prefetcher that hit the L2 cache. Requi…
1109 …erated by hardware L2 cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1117 …erated by hardware L2 cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1122 …erated by hardware L2 cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1130 …erated by hardware L2 cache prefetcher that miss the L2 cache with a snoop hit in the other proces…
1148 …on": "Counts reads for ownership (RFO) requests generated by L2 prefetcher that hit the L2 cache.",
1156 …"Counts reads for ownership (RFO) requests generated by L2 prefetcher that hit the L2 cache. Requi…
1174 …O) requests generated by L2 prefetcher that miss the L2 cache with a snoop hit in the other proces…
1182 …O) requests generated by L2 prefetcher that miss the L2 cache with a snoop hit in the other proces…
1187 …O) requests generated by L2 prefetcher that miss the L2 cache with a snoop hit in the other proces…
1195 …O) requests generated by L2 prefetcher that miss the L2 cache with a snoop hit in the other proces…
1213 …ounts any data writes to uncacheable write combining (USWC) memory region that hit the L2 cache.",
1221 … any data writes to uncacheable write combining (USWC) memory region that hit the L2 cache. Requi…
1239 …tion": "Counts data cache lines requests by software prefetch instructions that hit the L2 cache.",
1247 …: "Counts data cache lines requests by software prefetch instructions that hit the L2 cache. Requi…
1265 …ests by software prefetch instructions that miss the L2 cache with a snoop hit in the other proces…
1273 …ests by software prefetch instructions that miss the L2 cache with a snoop hit in the other proces…
1278 …ests by software prefetch instructions that miss the L2 cache with a snoop hit in the other proces…
1286 …ests by software prefetch instructions that miss the L2 cache with a snoop hit in the other proces…