Lines Matching +full:1 +full:- +full:3
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
8 …ounts the number of the divide operations executed. Uses edge-detect and a cmask value of 1 on ARI…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
23 "BriefDescription": "Speculative and retired macro-conditional branches",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
28 …": "This event counts both taken and not taken speculative and retired macro-conditional branch in…
33 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
34 "Counter": "0,1,2,3",
35 "CounterHTOff": "0,1,2,3,4,5,6,7",
38 …": "This event counts both taken and not taken speculative and retired macro-unconditional branch …
44 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7",
54 "Counter": "0,1,2,3",
55 "CounterHTOff": "0,1,2,3,4,5,6,7",
64 "Counter": "0,1,2,3",
65 "CounterHTOff": "0,1,2,3,4,5,6,7",
73 "BriefDescription": "Not taken macro-conditional branches",
74 "Counter": "0,1,2,3",
75 "CounterHTOff": "0,1,2,3,4,5,6,7",
78 "PublicDescription": "This event counts not taken macro-conditional branch instructions.",
83 "BriefDescription": "Taken speculative and retired macro-conditional branches",
84 "Counter": "0,1,2,3",
85 "CounterHTOff": "0,1,2,3,4,5,6,7",
88 …"PublicDescription": "This event counts taken speculative and retired macro-conditional branch ins…
93 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
94 "Counter": "0,1,2,3",
95 "CounterHTOff": "0,1,2,3,4,5,6,7",
98 …"PublicDescription": "This event counts taken speculative and retired macro-conditional branch ins…
104 "Counter": "0,1,2,3",
105 "CounterHTOff": "0,1,2,3,4,5,6,7",
114 "Counter": "0,1,2,3",
115 "CounterHTOff": "0,1,2,3,4,5,6,7",
124 "Counter": "0,1,2,3",
125 "CounterHTOff": "0,1,2,3,4,5,6,7",
134 "Counter": "0,1,2,3",
135 "CounterHTOff": "0,1,2,3,4,5,6,7",
144 "Counter": "0,1,2,3",
145 "CounterHTOff": "0,1,2,3,4,5,6,7",
152 "BriefDescription": "All (macro) branch instructions retired. (Precise Event - PEBS)",
153 "Counter": "0,1,2,3",
154 "CounterHTOff": "0,1,2,3",
165 "Counter": "0,1,2,3",
166 "CounterHTOff": "0,1,2,3,4,5,6,7",
169 "PEBS": "1",
176 "Counter": "0,1,2,3",
177 "CounterHTOff": "0,1,2,3,4,5,6,7",
187 "Counter": "0,1,2,3",
188 "CounterHTOff": "0,1,2,3,4,5,6,7",
191 "PEBS": "1",
197 …riefDescription": "Direct and indirect macro near call instructions retired (captured in ring 3).",
198 "Counter": "0,1,2,3",
199 "CounterHTOff": "0,1,2,3,4,5,6,7",
202 "PEBS": "1",
203 … event counts both direct and indirect macro near call instructions retired (captured in ring 3).",
209 "Counter": "0,1,2,3",
210 "CounterHTOff": "0,1,2,3,4,5,6,7",
213 "PEBS": "1",
220 "Counter": "0,1,2,3",
221 "CounterHTOff": "0,1,2,3,4,5,6,7",
224 "PEBS": "1",
231 "Counter": "0,1,2,3",
232 "CounterHTOff": "0,1,2,3,4,5,6,7",
241 "Counter": "0,1,2,3",
242 "CounterHTOff": "0,1,2,3,4,5,6,7",
251 "Counter": "0,1,2,3",
252 "CounterHTOff": "0,1,2,3,4,5,6,7",
261 "Counter": "0,1,2,3",
262 "CounterHTOff": "0,1,2,3,4,5,6,7",
271 "Counter": "0,1,2,3",
272 "CounterHTOff": "0,1,2,3,4,5,6,7",
281 "Counter": "0,1,2,3",
282 "CounterHTOff": "0,1,2,3,4,5,6,7",
291 "Counter": "0,1,2,3",
292 "CounterHTOff": "0,1,2,3,4,5,6,7",
301 "Counter": "0,1,2,3",
302 "CounterHTOff": "0,1,2,3,4,5,6,7",
310 "Counter": "0,1,2,3",
311 "CounterHTOff": "0,1,2,3,4,5,6,7",
320 "Counter": "0,1,2,3",
321 "CounterHTOff": "0,1,2,3,4,5,6,7",
328 … "BriefDescription": "Mispredicted macro branch instructions retired. (Precise Event - PEBS)",
329 "Counter": "0,1,2,3",
330 "CounterHTOff": "0,1,2,3",
340 "Counter": "0,1,2,3",
341 "CounterHTOff": "0,1,2,3,4,5,6,7",
344 "PEBS": "1",
351 "Counter": "0,1,2,3",
352 "CounterHTOff": "0,1,2,3,4,5,6,7",
355 "PEBS": "1",
362 "Counter": "0,1,2,3",
363 "CounterHTOff": "0,1,2,3,4,5,6,7",
366 "PEBS": "1",
373 "Counter": "0,1,2,3",
374 "CounterHTOff": "0,1,2,3",
382 "Counter": "0,1,2,3",
383 "CounterHTOff": "0,1,2,3,4,5,6,7",
386 …"PublicDescription": "This is a fixed-frequency event programmed to general counters. It counts wh…
391 "AnyThread": "1",
393 "Counter": "0,1,2,3",
394 "CounterHTOff": "0,1,2,3,4,5,6,7",
402 "Counter": "0,1,2,3",
403 "CounterHTOff": "0,1,2,3,4,5,6,7",
414 …1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counte…
420 "Counter": "0,1,2,3",
421 "CounterHTOff": "0,1,2,3,4,5,6,7",
429 "AnyThread": "1",
431 "Counter": "0,1,2,3",
432 "CounterHTOff": "0,1,2,3,4,5,6,7",
440 "Counter": "Fixed counter 1",
441 "CounterHTOff": "Fixed counter 1",
448 "AnyThread": "1",
450 "Counter": "Fixed counter 1",
451 "CounterHTOff": "Fixed counter 1",
458 "Counter": "0,1,2,3",
459 "CounterHTOff": "0,1,2,3,4,5,6,7",
466 "AnyThread": "1",
468 "Counter": "0,1,2,3",
469 "CounterHTOff": "0,1,2,3,4,5,6,7",
497 "Counter": "0,1,2,3",
498 "CounterHTOff": "0,1,2,3,4,5,6,7",
499 "CounterMask": "1",
507 "Counter": "0,1,2,3",
508 "CounterHTOff": "0,1,2,3,4,5,6,7",
509 "CounterMask": "1",
518 "Counter": "0,1,2,3",
519 "CounterHTOff": "0,1,2,3,4,5,6,7",
523 …e CPU has at least one pending demand load request (that is cycles with non-completed load waitin…
529 "Counter": "0,1,2,3",
530 "CounterHTOff": "0,1,2,3",
538 …"BriefDescription": "This event increments by 1 for every cycle where there was no execute for thi…
539 "Counter": "0,1,2,3",
540 "CounterHTOff": "0,1,2,3",
571 "Counter": "0,1,2,3",
572 "CounterHTOff": "0,1,2,3,4,5,6,7",
581 "Counter": "0,1,2,3",
582 "CounterHTOff": "0,1,2,3",
592 "Counter": "0,1,2,3",
593 "CounterHTOff": "0,1,2,3",
603 "Counter": "0,1,2,3",
604 "CounterHTOff": "0,1,2,3,4,5,6,7",
613 "Counter": "0,1,2,3",
614 "CounterHTOff": "0,1,2,3,4,5,6,7",
623 "Counter": "0,1,2,3",
624 "CounterHTOff": "0,1,2,3,4,5,6,7",
627 …he number of prefixes in a 16B-line. This may result in the following penalties: three-cycle penal…
636 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
641 … "BriefDescription": "Number of instructions retired. General Counter - architectural event",
642 "Counter": "0,1,2,3",
643 "CounterHTOff": "0,1,2,3,4,5,6,7",
647 …vent counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
652 "Counter": "1",
653 "CounterHTOff": "1",
664 "Counter": "0,1,2,3",
665 "CounterHTOff": "0,1,2,3,4,5,6,7",
674 "Counter": "0,1,2,3",
675 "CounterHTOff": "0,1,2,3,4,5,6,7",
684 "Counter": "0,1,2,3",
685 "CounterHTOff": "0,1,2,3,4,5,6,7",
686 "CounterMask": "1",
694 "AnyThread": "1",
696 "Counter": "0,1,2,3",
697 "CounterHTOff": "0,1,2,3,4,5,6,7",
698 "CounterMask": "1",
706 "Counter": "0,1,2,3",
707 "CounterHTOff": "0,1,2,3,4,5,6,7",
714 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
715 "Counter": "0,1,2,3",
716 "CounterHTOff": "0,1,2,3,4,5,6,7",
719 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
725 "Counter": "0,1,2,3",
726 "CounterHTOff": "0,1,2,3,4,5,6,7",
734 …"BriefDescription": "Not software-prefetch load dispatches that hit FB allocated for hardware pref…
735 "Counter": "0,1,2,3",
736 "CounterHTOff": "0,1,2,3,4,5,6,7",
739 …"PublicDescription": "This event counts all not software-prefetch load dispatches that hit the fil…
744 …"BriefDescription": "Not software-prefetch load dispatches that hit FB allocated for software pref…
745 "Counter": "0,1,2,3",
746 "CounterHTOff": "0,1,2,3,4,5,6,7",
749 …"PublicDescription": "This event counts all not software-prefetch load dispatches that hit the fil…
755 "Counter": "0,1,2,3",
756 "CounterHTOff": "0,1,2,3,4,5,6,7",
765 "Counter": "0,1,2,3",
766 "CounterHTOff": "0,1,2,3,4,5,6,7",
767 "CounterMask": "1",
775 "Counter": "0,1,2,3",
776 "CounterHTOff": "0,1,2,3,4,5,6,7",
784 "Counter": "0,1,2,3",
785 "CounterHTOff": "0,1,2,3,4,5,6,7",
786 "CounterMask": "1",
787 "EdgeDetect": "1",
794 …"BriefDescription": "Cycles there was a Nuke. Account for both thread-specific and All Thread Nuke…
795 "Counter": "0,1,2,3",
796 "CounterHTOff": "0,1,2,3,4,5,6,7",
799 … "PublicDescription": "This event counts both thread-specific (TS) and all-thread (AT) nukes.",
805 "Counter": "0,1,2,3",
806 "CounterHTOff": "0,1,2,3,4,5,6,7",
809 …"PublicDescription": "Maskmov false fault - counts number of time ucode passes through Maskmov flo…
814 "BriefDescription": "Self-modifying code (SMC) detected.",
815 "Counter": "0,1,2,3",
816 "CounterHTOff": "0,1,2,3,4,5,6,7",
819 …"PublicDescription": "This event counts self-modifying code (SMC) detected, which causes a machine…
825 "Counter": "0,1,2,3",
826 "CounterHTOff": "0,1,2,3,4,5,6,7",
834 "Counter": "0,1,2,3",
835 "CounterHTOff": "0,1,2,3,4,5,6,7",
843 "Counter": "0,1,2,3",
844 "CounterHTOff": "0,1,2,3,4,5,6,7",
851 "BriefDescription": "Resource-related stall cycles",
852 "Counter": "0,1,2,3",
853 "CounterHTOff": "0,1,2,3,4,5,6,7",
856 "PublicDescription": "This event counts resource-related stall cycles.",
861 "BriefDescription": "Cycles stalled due to re-order buffer full.",
862 "Counter": "0,1,2,3",
863 "CounterHTOff": "0,1,2,3,4,5,6,7",
872 "Counter": "0,1,2,3",
873 "CounterHTOff": "0,1,2,3,4,5,6,7",
882 "Counter": "0,1,2,3",
883 "CounterHTOff": "0,1,2,3,4,5,6,7",
892 "Counter": "0,1,2,3",
893 "CounterHTOff": "0,1,2,3,4,5,6,7",
902 "Counter": "0,1,2,3",
903 "CounterHTOff": "0,1,2,3,4,5,6,7",
906 …ing which the reservation station (RS) is empty for the thread.\nNote: In ST-mode, not active thre…
912 "Counter": "0,1,2,3",
913 "CounterHTOff": "0,1,2,3,4,5,6,7",
914 "CounterMask": "1",
915 "EdgeDetect": "1",
918 "Invert": "1",
924 "Counter": "0,1,2,3",
925 "CounterHTOff": "0,1,2,3,4,5,6,7",
928 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
933 "BriefDescription": "Cycles per thread when uops are executed in port 1",
934 "Counter": "0,1,2,3",
935 "CounterHTOff": "0,1,2,3,4,5,6,7",
938 …is event counts, on the per-thread basis, cycles during which uops are dispatched from the Reserva…
944 "Counter": "0,1,2,3",
945 "CounterHTOff": "0,1,2,3,4,5,6,7",
948 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
953 "BriefDescription": "Cycles per thread when uops are executed in port 3",
954 "Counter": "0,1,2,3",
955 "CounterHTOff": "0,1,2,3,4,5,6,7",
958 …is event counts, on the per-thread basis, cycles during which uops are dispatched from the Reserva…
964 "Counter": "0,1,2,3",
965 "CounterHTOff": "0,1,2,3,4,5,6,7",
968 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
974 "Counter": "0,1,2,3",
975 "CounterHTOff": "0,1,2,3,4,5,6,7",
978 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
984 "Counter": "0,1,2,3",
985 "CounterHTOff": "0,1,2,3,4,5,6,7",
988 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
994 "Counter": "0,1,2,3",
995 "CounterHTOff": "0,1,2,3,4,5,6,7",
998 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
1004 "Counter": "0,1,2,3",
1005 "CounterHTOff": "0,1,2,3,4,5,6,7",
1013 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
1014 "Counter": "0,1,2,3",
1015 "CounterHTOff": "0,1,2,3,4,5,6,7",
1016 "CounterMask": "1",
1023 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
1024 "Counter": "0,1,2,3",
1025 "CounterHTOff": "0,1,2,3,4,5,6,7",
1033 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
1034 "Counter": "0,1,2,3",
1035 "CounterHTOff": "0,1,2,3,4,5,6,7",
1036 "CounterMask": "3",
1043 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
1044 "Counter": "0,1,2,3",
1045 "CounterHTOff": "0,1,2,3,4,5,6,7",
1053 "BriefDescription": "Cycles with no micro-ops executed from any thread on physical core.",
1054 "Counter": "0,1,2,3",
1055 "CounterHTOff": "0,1,2,3,4,5,6,7",
1058 "Invert": "1",
1063 "BriefDescription": "Cycles where at least 1 uop was executed per-thread.",
1064 "Counter": "0,1,2,3",
1065 "CounterHTOff": "0,1,2,3",
1066 "CounterMask": "1",
1073 "BriefDescription": "Cycles where at least 2 uops were executed per-thread.",
1074 "Counter": "0,1,2,3",
1075 "CounterHTOff": "0,1,2,3",
1083 "BriefDescription": "Cycles where at least 3 uops were executed per-thread.",
1084 "Counter": "0,1,2,3",
1085 "CounterHTOff": "0,1,2,3",
1086 "CounterMask": "3",
1093 "BriefDescription": "Cycles where at least 4 uops were executed per-thread.",
1094 "Counter": "0,1,2,3",
1095 "CounterHTOff": "0,1,2,3",
1104 "Counter": "0,1,2,3",
1105 "CounterHTOff": "0,1,2,3",
1106 "CounterMask": "1",
1109 "Invert": "1",
1115 "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
1116 "Counter": "0,1,2,3",
1117 "CounterHTOff": "0,1,2,3,4,5,6,7",
1120 "PublicDescription": "Number of uops to be executed per-thread each cycle.",
1126 "Counter": "0,1,2,3",
1127 "CounterHTOff": "0,1,2,3,4,5,6,7",
1130 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
1135 "AnyThread": "1",
1137 "Counter": "0,1,2,3",
1138 "CounterHTOff": "0,1,2,3,4,5,6,7",
1145 "BriefDescription": "Cycles per thread when uops are executed in port 1",
1146 "Counter": "0,1,2,3",
1147 "CounterHTOff": "0,1,2,3,4,5,6,7",
1150 …is event counts, on the per-thread basis, cycles during which uops are dispatched from the Reserva…
1155 "AnyThread": "1",
1156 "BriefDescription": "Cycles per core when uops are exectuted in port 1.",
1157 "Counter": "0,1,2,3",
1158 "CounterHTOff": "0,1,2,3,4,5,6,7",
1166 "Counter": "0,1,2,3",
1167 "CounterHTOff": "0,1,2,3,4,5,6,7",
1170 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
1175 "AnyThread": "1",
1177 "Counter": "0,1,2,3",
1178 "CounterHTOff": "0,1,2,3,4,5,6,7",
1185 "BriefDescription": "Cycles per thread when uops are executed in port 3",
1186 "Counter": "0,1,2,3",
1187 "CounterHTOff": "0,1,2,3,4,5,6,7",
1190 …is event counts, on the per-thread basis, cycles during which uops are dispatched from the Reserva…
1195 "AnyThread": "1",
1196 "BriefDescription": "Cycles per core when uops are dispatched to port 3.",
1197 "Counter": "0,1,2,3",
1198 "CounterHTOff": "0,1,2,3,4,5,6,7",
1206 "Counter": "0,1,2,3",
1207 "CounterHTOff": "0,1,2,3,4,5,6,7",
1210 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
1215 "AnyThread": "1",
1217 "Counter": "0,1,2,3",
1218 "CounterHTOff": "0,1,2,3,4,5,6,7",
1226 "Counter": "0,1,2,3",
1227 "CounterHTOff": "0,1,2,3,4,5,6,7",
1230 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
1235 "AnyThread": "1",
1237 "Counter": "0,1,2,3",
1238 "CounterHTOff": "0,1,2,3,4,5,6,7",
1246 "Counter": "0,1,2,3",
1247 "CounterHTOff": "0,1,2,3,4,5,6,7",
1250 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
1255 "AnyThread": "1",
1257 "Counter": "0,1,2,3",
1258 "CounterHTOff": "0,1,2,3,4,5,6,7",
1266 "Counter": "0,1,2,3",
1267 "CounterHTOff": "0,1,2,3,4,5,6,7",
1270 …"PublicDescription": "This event counts, on the per-thread basis, cycles during which uops are dis…
1275 "AnyThread": "1",
1277 "Counter": "0,1,2,3",
1278 "CounterHTOff": "0,1,2,3,4,5,6,7",
1286 "Counter": "0,1,2,3",
1287 "CounterHTOff": "0,1,2,3,4,5,6,7",
1295 …"BriefDescription": "Number of flags-merge uops being allocated. Such uops considered perf sensiti…
1296 "Counter": "0,1,2,3",
1297 "CounterHTOff": "0,1,2,3,4,5,6,7",
1300 …ublicDescription": "Number of flags-merge uops being allocated. Such uops considered perf sensitiv…
1306 "Counter": "0,1,2,3",
1307 "CounterHTOff": "0,1,2,3,4,5,6,7",
1314 …w LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sour…
1315 "Counter": "0,1,2,3",
1316 "CounterHTOff": "0,1,2,3,4,5,6,7",
1324 "Counter": "0,1,2,3",
1325 "CounterHTOff": "0,1,2,3",
1326 "CounterMask": "1",
1329 "Invert": "1",
1336 "Counter": "0,1,2,3",
1337 "CounterHTOff": "0,1,2,3,4,5,6,7",
1340 "PEBS": "1",
1341 …actually retired uops. Counting increments by two for micro-fused uops, and by one for macro-fused…
1347 "Counter": "0,1,2,3",
1348 "CounterHTOff": "0,1,2,3,4,5,6,7",
1351 "PEBS": "1",
1358 "Counter": "0,1,2,3",
1359 "CounterHTOff": "0,1,2,3",
1360 "CounterMask": "1",
1363 "Invert": "1",
1370 "Counter": "0,1,2,3",
1371 "CounterHTOff": "0,1,2,3",
1375 "Invert": "1",