Lines Matching +full:0 +full:xa1
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x14",
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
16 "EventCode": "0x88",
20 "UMask": "0xff"
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3,4,5,6,7",
26 "EventCode": "0x88",
30 "UMask": "0xc1"
34 "Counter": "0,1,2,3",
35 "CounterHTOff": "0,1,2,3,4,5,6,7",
36 "EventCode": "0x88",
40 "UMask": "0xc2"
44 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7",
46 "EventCode": "0x88",
50 "UMask": "0xd0"
54 "Counter": "0,1,2,3",
55 "CounterHTOff": "0,1,2,3,4,5,6,7",
56 "EventCode": "0x88",
60 "UMask": "0xc4"
64 "Counter": "0,1,2,3",
65 "CounterHTOff": "0,1,2,3,4,5,6,7",
66 "EventCode": "0x88",
70 "UMask": "0xc8"
74 "Counter": "0,1,2,3",
75 "CounterHTOff": "0,1,2,3,4,5,6,7",
76 "EventCode": "0x88",
80 "UMask": "0x41"
84 "Counter": "0,1,2,3",
85 "CounterHTOff": "0,1,2,3,4,5,6,7",
86 "EventCode": "0x88",
90 "UMask": "0x81"
94 "Counter": "0,1,2,3",
95 "CounterHTOff": "0,1,2,3,4,5,6,7",
96 "EventCode": "0x88",
100 "UMask": "0x82"
104 "Counter": "0,1,2,3",
105 "CounterHTOff": "0,1,2,3,4,5,6,7",
106 "EventCode": "0x88",
110 "UMask": "0x90"
114 "Counter": "0,1,2,3",
115 "CounterHTOff": "0,1,2,3,4,5,6,7",
116 "EventCode": "0x88",
120 "UMask": "0x84"
124 "Counter": "0,1,2,3",
125 "CounterHTOff": "0,1,2,3,4,5,6,7",
126 "EventCode": "0x88",
130 "UMask": "0xa0"
134 "Counter": "0,1,2,3",
135 "CounterHTOff": "0,1,2,3,4,5,6,7",
136 "EventCode": "0x88",
140 "UMask": "0x88"
144 "Counter": "0,1,2,3",
145 "CounterHTOff": "0,1,2,3,4,5,6,7",
146 "EventCode": "0xC4",
153 "Counter": "0,1,2,3",
154 "CounterHTOff": "0,1,2,3",
156 "EventCode": "0xC4",
161 "UMask": "0x4"
165 "Counter": "0,1,2,3",
166 "CounterHTOff": "0,1,2,3,4,5,6,7",
167 "EventCode": "0xC4",
172 "UMask": "0x1"
176 "Counter": "0,1,2,3",
177 "CounterHTOff": "0,1,2,3,4,5,6,7",
179 "EventCode": "0xC4",
183 "UMask": "0x40"
187 "Counter": "0,1,2,3",
188 "CounterHTOff": "0,1,2,3,4,5,6,7",
189 "EventCode": "0xC4",
194 "UMask": "0x2"
198 "Counter": "0,1,2,3",
199 "CounterHTOff": "0,1,2,3,4,5,6,7",
200 "EventCode": "0xC4",
205 "UMask": "0x2"
209 "Counter": "0,1,2,3",
210 "CounterHTOff": "0,1,2,3,4,5,6,7",
211 "EventCode": "0xC4",
216 "UMask": "0x8"
220 "Counter": "0,1,2,3",
221 "CounterHTOff": "0,1,2,3,4,5,6,7",
222 "EventCode": "0xC4",
227 "UMask": "0x20"
231 "Counter": "0,1,2,3",
232 "CounterHTOff": "0,1,2,3,4,5,6,7",
233 "EventCode": "0xC4",
237 "UMask": "0x10"
241 "Counter": "0,1,2,3",
242 "CounterHTOff": "0,1,2,3,4,5,6,7",
243 "EventCode": "0x89",
247 "UMask": "0xff"
251 "Counter": "0,1,2,3",
252 "CounterHTOff": "0,1,2,3,4,5,6,7",
253 "EventCode": "0x89",
257 "UMask": "0xc1"
261 "Counter": "0,1,2,3",
262 "CounterHTOff": "0,1,2,3,4,5,6,7",
263 "EventCode": "0x89",
267 "UMask": "0xc4"
271 "Counter": "0,1,2,3",
272 "CounterHTOff": "0,1,2,3,4,5,6,7",
273 "EventCode": "0x89",
277 "UMask": "0x41"
281 "Counter": "0,1,2,3",
282 "CounterHTOff": "0,1,2,3,4,5,6,7",
283 "EventCode": "0x89",
287 "UMask": "0x81"
291 "Counter": "0,1,2,3",
292 "CounterHTOff": "0,1,2,3,4,5,6,7",
293 "EventCode": "0x89",
297 "UMask": "0x84"
301 "Counter": "0,1,2,3",
302 "CounterHTOff": "0,1,2,3,4,5,6,7",
303 "EventCode": "0x89",
306 "UMask": "0xa0"
310 "Counter": "0,1,2,3",
311 "CounterHTOff": "0,1,2,3,4,5,6,7",
312 "EventCode": "0x89",
316 "UMask": "0x88"
320 "Counter": "0,1,2,3",
321 "CounterHTOff": "0,1,2,3,4,5,6,7",
322 "EventCode": "0xC5",
329 "Counter": "0,1,2,3",
330 "CounterHTOff": "0,1,2,3",
331 "EventCode": "0xC5",
336 "UMask": "0x4"
340 "Counter": "0,1,2,3",
341 "CounterHTOff": "0,1,2,3,4,5,6,7",
342 "EventCode": "0xC5",
347 "UMask": "0x1"
351 "Counter": "0,1,2,3",
352 "CounterHTOff": "0,1,2,3,4,5,6,7",
353 "EventCode": "0xC5",
358 "UMask": "0x20"
362 "Counter": "0,1,2,3",
363 "CounterHTOff": "0,1,2,3,4,5,6,7",
364 "EventCode": "0xC5",
369 "UMask": "0x8"
373 "Counter": "0,1,2,3",
374 "CounterHTOff": "0,1,2,3",
375 "EventCode": "0x3c",
378 "UMask": "0x2"
382 "Counter": "0,1,2,3",
383 "CounterHTOff": "0,1,2,3,4,5,6,7",
384 "EventCode": "0x3C",
388 "UMask": "0x1"
393 "Counter": "0,1,2,3",
394 "CounterHTOff": "0,1,2,3,4,5,6,7",
395 "EventCode": "0x3C",
398 "UMask": "0x1"
402 "Counter": "0,1,2,3",
403 "CounterHTOff": "0,1,2,3,4,5,6,7",
404 "EventCode": "0x3C",
407 "UMask": "0x2"
416 "UMask": "0x3"
420 "Counter": "0,1,2,3",
421 "CounterHTOff": "0,1,2,3,4,5,6,7",
422 "EventCode": "0x3C",
426 "UMask": "0x1"
431 "Counter": "0,1,2,3",
432 "CounterHTOff": "0,1,2,3,4,5,6,7",
433 "EventCode": "0x3C",
436 "UMask": "0x1"
445 "UMask": "0x2"
454 "UMask": "0x2"
458 "Counter": "0,1,2,3",
459 "CounterHTOff": "0,1,2,3,4,5,6,7",
460 "EventCode": "0x3C",
468 "Counter": "0,1,2,3",
469 "CounterHTOff": "0,1,2,3,4,5,6,7",
470 "EventCode": "0x3C",
479 "EventCode": "0xA3",
482 "UMask": "0x8"
489 "EventCode": "0xA3",
493 "UMask": "0x8"
497 "Counter": "0,1,2,3",
498 "CounterHTOff": "0,1,2,3,4,5,6,7",
500 "EventCode": "0xA3",
503 "UMask": "0x1"
507 "Counter": "0,1,2,3",
508 "CounterHTOff": "0,1,2,3,4,5,6,7",
510 "EventCode": "0xA3",
514 "UMask": "0x1"
518 "Counter": "0,1,2,3",
519 "CounterHTOff": "0,1,2,3,4,5,6,7",
521 "EventCode": "0xA3",
525 "UMask": "0x2"
529 "Counter": "0,1,2,3",
530 "CounterHTOff": "0,1,2,3",
532 "EventCode": "0xA3",
535 "UMask": "0x2"
539 "Counter": "0,1,2,3",
540 "CounterHTOff": "0,1,2,3",
542 "EventCode": "0xA3",
546 "UMask": "0x4"
553 "EventCode": "0xA3",
556 "UMask": "0xc"
563 "EventCode": "0xA3",
567 "UMask": "0xc"
571 "Counter": "0,1,2,3",
572 "CounterHTOff": "0,1,2,3,4,5,6,7",
574 "EventCode": "0xA3",
577 "UMask": "0x5"
581 "Counter": "0,1,2,3",
582 "CounterHTOff": "0,1,2,3",
584 "EventCode": "0xA3",
588 "UMask": "0x5"
592 "Counter": "0,1,2,3",
593 "CounterHTOff": "0,1,2,3",
595 "EventCode": "0xA3",
599 "UMask": "0x6"
603 "Counter": "0,1,2,3",
604 "CounterHTOff": "0,1,2,3,4,5,6,7",
606 "EventCode": "0xA3",
609 "UMask": "0x6"
613 "Counter": "0,1,2,3",
614 "CounterHTOff": "0,1,2,3,4,5,6,7",
616 "EventCode": "0xA3",
619 "UMask": "0x4"
623 "Counter": "0,1,2,3",
624 "CounterHTOff": "0,1,2,3,4,5,6,7",
625 "EventCode": "0x87",
629 "UMask": "0x1"
633 "Counter": "Fixed counter 0",
634 "CounterHTOff": "Fixed counter 0",
638 "UMask": "0x1"
642 "Counter": "0,1,2,3",
643 "CounterHTOff": "0,1,2,3,4,5,6,7",
645 "EventCode": "0xC0",
655 "EventCode": "0xC0",
660 "UMask": "0x1"
664 "Counter": "0,1,2,3",
665 "CounterHTOff": "0,1,2,3,4,5,6,7",
666 "EventCode": "0xC0",
670 "UMask": "0x2"
674 "Counter": "0,1,2,3",
675 "CounterHTOff": "0,1,2,3,4,5,6,7",
676 "EventCode": "0x0D",
680 "UMask": "0x8"
684 "Counter": "0,1,2,3",
685 "CounterHTOff": "0,1,2,3,4,5,6,7",
687 "EventCode": "0x0D",
691 "UMask": "0x3"
696 "Counter": "0,1,2,3",
697 "CounterHTOff": "0,1,2,3,4,5,6,7",
699 "EventCode": "0x0D",
702 "UMask": "0x3"
706 "Counter": "0,1,2,3",
707 "CounterHTOff": "0,1,2,3,4,5,6,7",
708 "EventCode": "0x03",
711 "UMask": "0x8"
715 "Counter": "0,1,2,3",
716 "CounterHTOff": "0,1,2,3,4,5,6,7",
717 "EventCode": "0x03",
721 "UMask": "0x2"
725 "Counter": "0,1,2,3",
726 "CounterHTOff": "0,1,2,3,4,5,6,7",
727 "EventCode": "0x07",
731 "UMask": "0x1"
735 "Counter": "0,1,2,3",
736 "CounterHTOff": "0,1,2,3,4,5,6,7",
737 "EventCode": "0x4C",
741 "UMask": "0x2"
745 "Counter": "0,1,2,3",
746 "CounterHTOff": "0,1,2,3,4,5,6,7",
747 "EventCode": "0x4c",
751 "UMask": "0x1"
755 "Counter": "0,1,2,3",
756 "CounterHTOff": "0,1,2,3,4,5,6,7",
758 "EventCode": "0xA8",
761 "UMask": "0x1"
765 "Counter": "0,1,2,3",
766 "CounterHTOff": "0,1,2,3,4,5,6,7",
768 "EventCode": "0xA8",
771 "UMask": "0x1"
775 "Counter": "0,1,2,3",
776 "CounterHTOff": "0,1,2,3,4,5,6,7",
777 "EventCode": "0xA8",
780 "UMask": "0x1"
784 "Counter": "0,1,2,3",
785 "CounterHTOff": "0,1,2,3,4,5,6,7",
788 "EventCode": "0xC3",
791 "UMask": "0x1"
795 "Counter": "0,1,2,3",
796 "CounterHTOff": "0,1,2,3,4,5,6,7",
797 "EventCode": "0xC3",
801 "UMask": "0x1"
804 …el AVX masked load operations that refer to an illegal address range with the mask bits set to 0.",
805 "Counter": "0,1,2,3",
806 "CounterHTOff": "0,1,2,3,4,5,6,7",
807 "EventCode": "0xC3",
809 …r of time ucode passes through Maskmov flow due to instruction's mask being 0 while the flow was c…
811 "UMask": "0x20"
815 "Counter": "0,1,2,3",
816 "CounterHTOff": "0,1,2,3,4,5,6,7",
817 "EventCode": "0xC3",
821 "UMask": "0x4"
825 "Counter": "0,1,2,3",
826 "CounterHTOff": "0,1,2,3,4,5,6,7",
827 "EventCode": "0x58",
830 "UMask": "0x1"
834 "Counter": "0,1,2,3",
835 "CounterHTOff": "0,1,2,3,4,5,6,7",
836 "EventCode": "0x58",
839 "UMask": "0x4"
843 "Counter": "0,1,2,3",
844 "CounterHTOff": "0,1,2,3,4,5,6,7",
845 "EventCode": "0xC1",
848 "UMask": "0x40"
852 "Counter": "0,1,2,3",
853 "CounterHTOff": "0,1,2,3,4,5,6,7",
854 "EventCode": "0xA2",
858 "UMask": "0x1"
862 "Counter": "0,1,2,3",
863 "CounterHTOff": "0,1,2,3,4,5,6,7",
864 "EventCode": "0xA2",
868 "UMask": "0x10"
872 "Counter": "0,1,2,3",
873 "CounterHTOff": "0,1,2,3,4,5,6,7",
874 "EventCode": "0xA2",
878 "UMask": "0x4"
882 "Counter": "0,1,2,3",
883 "CounterHTOff": "0,1,2,3,4,5,6,7",
884 "EventCode": "0xA2",
888 "UMask": "0x8"
892 "Counter": "0,1,2,3",
893 "CounterHTOff": "0,1,2,3,4,5,6,7",
894 "EventCode": "0xCC",
898 "UMask": "0x20"
902 "Counter": "0,1,2,3",
903 "CounterHTOff": "0,1,2,3,4,5,6,7",
904 "EventCode": "0x5E",
906 … is empty for the thread.\nNote: In ST-mode, not active thread should drive 0. This is usually cau…
908 "UMask": "0x1"
912 "Counter": "0,1,2,3",
913 "CounterHTOff": "0,1,2,3,4,5,6,7",
916 "EventCode": "0x5E",
920 "UMask": "0x1"
923 "BriefDescription": "Cycles per thread when uops are executed in port 0",
924 "Counter": "0,1,2,3",
925 "CounterHTOff": "0,1,2,3,4,5,6,7",
926 "EventCode": "0xA1",
928 …hread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 0.",
930 "UMask": "0x1"
934 "Counter": "0,1,2,3",
935 "CounterHTOff": "0,1,2,3,4,5,6,7",
936 "EventCode": "0xA1",
940 "UMask": "0x2"
944 "Counter": "0,1,2,3",
945 "CounterHTOff": "0,1,2,3,4,5,6,7",
946 "EventCode": "0xA1",
950 "UMask": "0x4"
954 "Counter": "0,1,2,3",
955 "CounterHTOff": "0,1,2,3,4,5,6,7",
956 "EventCode": "0xA1",
960 "UMask": "0x8"
964 "Counter": "0,1,2,3",
965 "CounterHTOff": "0,1,2,3,4,5,6,7",
966 "EventCode": "0xA1",
970 "UMask": "0x10"
974 "Counter": "0,1,2,3",
975 "CounterHTOff": "0,1,2,3,4,5,6,7",
976 "EventCode": "0xA1",
980 "UMask": "0x20"
984 "Counter": "0,1,2,3",
985 "CounterHTOff": "0,1,2,3,4,5,6,7",
986 "EventCode": "0xA1",
990 "UMask": "0x40"
994 "Counter": "0,1,2,3",
995 "CounterHTOff": "0,1,2,3,4,5,6,7",
996 "EventCode": "0xA1",
1000 "UMask": "0x80"
1004 "Counter": "0,1,2,3",
1005 "CounterHTOff": "0,1,2,3,4,5,6,7",
1006 "EventCode": "0xB1",
1010 "UMask": "0x2"
1014 "Counter": "0,1,2,3",
1015 "CounterHTOff": "0,1,2,3,4,5,6,7",
1017 "EventCode": "0xb1",
1020 "UMask": "0x2"
1024 "Counter": "0,1,2,3",
1025 "CounterHTOff": "0,1,2,3,4,5,6,7",
1027 "EventCode": "0xb1",
1030 "UMask": "0x2"
1034 "Counter": "0,1,2,3",
1035 "CounterHTOff": "0,1,2,3,4,5,6,7",
1037 "EventCode": "0xb1",
1040 "UMask": "0x2"
1044 "Counter": "0,1,2,3",
1045 "CounterHTOff": "0,1,2,3,4,5,6,7",
1047 "EventCode": "0xb1",
1050 "UMask": "0x2"
1054 "Counter": "0,1,2,3",
1055 "CounterHTOff": "0,1,2,3,4,5,6,7",
1056 "EventCode": "0xb1",
1060 "UMask": "0x2"
1064 "Counter": "0,1,2,3",
1065 "CounterHTOff": "0,1,2,3",
1067 "EventCode": "0xB1",
1070 "UMask": "0x1"
1074 "Counter": "0,1,2,3",
1075 "CounterHTOff": "0,1,2,3",
1077 "EventCode": "0xB1",
1080 "UMask": "0x1"
1084 "Counter": "0,1,2,3",
1085 "CounterHTOff": "0,1,2,3",
1087 "EventCode": "0xB1",
1090 "UMask": "0x1"
1094 "Counter": "0,1,2,3",
1095 "CounterHTOff": "0,1,2,3",
1097 "EventCode": "0xB1",
1100 "UMask": "0x1"
1104 "Counter": "0,1,2,3",
1105 "CounterHTOff": "0,1,2,3",
1107 "EventCode": "0xB1",
1112 "UMask": "0x1"
1116 "Counter": "0,1,2,3",
1117 "CounterHTOff": "0,1,2,3,4,5,6,7",
1118 "EventCode": "0xB1",
1122 "UMask": "0x1"
1125 "BriefDescription": "Cycles per thread when uops are executed in port 0",
1126 "Counter": "0,1,2,3",
1127 "CounterHTOff": "0,1,2,3,4,5,6,7",
1128 "EventCode": "0xA1",
1130 …hread basis, cycles during which uops are dispatched from the Reservation Station (RS) to port 0.",
1132 "UMask": "0x1"
1136 "BriefDescription": "Cycles per core when uops are exectuted in port 0.",
1137 "Counter": "0,1,2,3",
1138 "CounterHTOff": "0,1,2,3,4,5,6,7",
1139 "EventCode": "0xA1",
1142 "UMask": "0x1"
1146 "Counter": "0,1,2,3",
1147 "CounterHTOff": "0,1,2,3,4,5,6,7",
1148 "EventCode": "0xA1",
1152 "UMask": "0x2"
1157 "Counter": "0,1,2,3",
1158 "CounterHTOff": "0,1,2,3,4,5,6,7",
1159 "EventCode": "0xA1",
1162 "UMask": "0x2"
1166 "Counter": "0,1,2,3",
1167 "CounterHTOff": "0,1,2,3,4,5,6,7",
1168 "EventCode": "0xA1",
1172 "UMask": "0x4"
1177 "Counter": "0,1,2,3",
1178 "CounterHTOff": "0,1,2,3,4,5,6,7",
1179 "EventCode": "0xA1",
1182 "UMask": "0x4"
1186 "Counter": "0,1,2,3",
1187 "CounterHTOff": "0,1,2,3,4,5,6,7",
1188 "EventCode": "0xA1",
1192 "UMask": "0x8"
1197 "Counter": "0,1,2,3",
1198 "CounterHTOff": "0,1,2,3,4,5,6,7",
1199 "EventCode": "0xA1",
1202 "UMask": "0x8"
1206 "Counter": "0,1,2,3",
1207 "CounterHTOff": "0,1,2,3,4,5,6,7",
1208 "EventCode": "0xA1",
1212 "UMask": "0x10"
1217 "Counter": "0,1,2,3",
1218 "CounterHTOff": "0,1,2,3,4,5,6,7",
1219 "EventCode": "0xA1",
1222 "UMask": "0x10"
1226 "Counter": "0,1,2,3",
1227 "CounterHTOff": "0,1,2,3,4,5,6,7",
1228 "EventCode": "0xA1",
1232 "UMask": "0x20"
1237 "Counter": "0,1,2,3",
1238 "CounterHTOff": "0,1,2,3,4,5,6,7",
1239 "EventCode": "0xA1",
1242 "UMask": "0x20"
1246 "Counter": "0,1,2,3",
1247 "CounterHTOff": "0,1,2,3,4,5,6,7",
1248 "EventCode": "0xA1",
1252 "UMask": "0x40"
1257 "Counter": "0,1,2,3",
1258 "CounterHTOff": "0,1,2,3,4,5,6,7",
1259 "EventCode": "0xA1",
1262 "UMask": "0x40"
1266 "Counter": "0,1,2,3",
1267 "CounterHTOff": "0,1,2,3,4,5,6,7",
1268 "EventCode": "0xA1",
1272 "UMask": "0x80"
1277 "Counter": "0,1,2,3",
1278 "CounterHTOff": "0,1,2,3,4,5,6,7",
1279 "EventCode": "0xA1",
1282 "UMask": "0x80"
1286 "Counter": "0,1,2,3",
1287 "CounterHTOff": "0,1,2,3,4,5,6,7",
1288 "EventCode": "0x0E",
1292 "UMask": "0x1"
1296 "Counter": "0,1,2,3",
1297 "CounterHTOff": "0,1,2,3,4,5,6,7",
1298 "EventCode": "0x0E",
1302 "UMask": "0x10"
1306 "Counter": "0,1,2,3",
1307 "CounterHTOff": "0,1,2,3,4,5,6,7",
1308 "EventCode": "0x0E",
1311 "UMask": "0x40"
1315 "Counter": "0,1,2,3",
1316 "CounterHTOff": "0,1,2,3,4,5,6,7",
1317 "EventCode": "0x0E",
1320 "UMask": "0x20"
1324 "Counter": "0,1,2,3",
1325 "CounterHTOff": "0,1,2,3",
1327 "EventCode": "0x0E",
1332 "UMask": "0x1"
1336 "Counter": "0,1,2,3",
1337 "CounterHTOff": "0,1,2,3,4,5,6,7",
1339 "EventCode": "0xC2",
1344 "UMask": "0x1"
1348 "Counter": "0,1,2,3",
1349 "CounterHTOff": "0,1,2,3,4,5,6,7",
1350 "EventCode": "0xC2",
1355 "UMask": "0x2"
1359 "Counter": "0,1,2,3",
1360 "CounterHTOff": "0,1,2,3",
1362 "EventCode": "0xC2",
1367 "UMask": "0x1"
1371 "Counter": "0,1,2,3",
1372 "CounterHTOff": "0,1,2,3",
1374 "EventCode": "0xC2",
1379 "UMask": "0x1"