Lines Matching +full:per +full:- +full:rate
3 …Total pipeline cost of branch related instructions (used for program control-flow including functi…
4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR…
10 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
17 "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
24 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
31 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
38 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor",
45 "BriefDescription": "The ratio of Executed- by Issued-Uops",
49 …ion": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop micro-fusions. R…
53 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
60 "BriefDescription": "Floating Point Operations Per Cycle",
67 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th…
71 …ion": "Actual per-core usage of the Floating Point execution units (regardless of the vector width…
75 …"BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is …
82 … "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
96 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
103 "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
110 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
117 … "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)",
124 "BriefDescription": "Instruction per taken branch",
131 "BriefDescription": "Branch instructions per taken branch. ",
138 …"BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occ…
145 …"BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurre…
149 …"PublicDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurr…
153 …Description": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number me…
157 …Description": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number me…
161 …Description": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number me…
165 …Description": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number me…
169 …riefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means …
173 …blicDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means …
177 …"BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means h…
181 …PublicDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means h…
192 "BriefDescription": "Average number of Uops issued by front-end when it issued something",
213 "BriefDescription": "Number of Instructions per non-speculative DSB miss",
220 "BriefDescription": "Fraction of branches that are non-taken conditionals",
242 …"MetricExpr": "(BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR…
249 …- ( (BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (BR_INST_RETIRED.COND_TAKEN / B…
255 …"BriefDescription": "Actual Average Latency for L1 data-cache miss demand load instructions (in co…
259 … Latency for L1 data-cache miss demand load instructions (in core cycles). Latency may be overesti…
263 …BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is …
284 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
291 "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]",
298 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",
305 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…
312 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",
319 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…
326 …"BriefDescription": "L2 cache misses per kilo instruction for all demand loads (including specula…
333 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…
334 "MetricExpr": "1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY",
340 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…
347 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
354 … "BriefDescription": "Fill Buffer (FB) true hits per kilo instructions for retired demand loads",
383 "BriefDescription": "Giga Floating Point Operations Per Second",
398 …"MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_o…
411 "BriefDescription": "Cycles Per Instruction for the Operating System (OS) Kernel mode",
432 …per Far Branch ( Far Branches apply upon transition from application to operating system, handling…
496 "BriefDescription": "Instructions Per Cycle",
502 "BriefDescription": "Cycles Per Instruction",
508 "BriefDescription": "Uops Per Instruction",
514 …"BriefDescription": "Percentage of total non-speculative loads with a store forward or unknown sto…
520 … "BriefDescription": "Percentage of total non-speculative loads with a address aliasing block",
526 "BriefDescription": "Percentage of total non-speculative loads that are splits",
532 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
538 … "BriefDescription": "Instruction per (near) call (lower number means higher occurrence rate)",
544 "BriefDescription": "Instructions per Load",
550 "BriefDescription": "Instructions per Store",
556 "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction",
562 "BriefDescription": "Instructions per Far Branch",
628 "BriefDescription": "Cycle cost per L2 hit",
634 "BriefDescription": "Cycle cost per LLC hit",
640 "BriefDescription": "Cycle cost per DRAM hit",
664 "BriefDescription": "load ops retired per 1000 instruction",
670 "BriefDescription": "C1 residency percent per core",
671 "MetricExpr": "(cstate_core@c1\\-residency@ / msr@tsc@) * 100",
676 "BriefDescription": "C6 residency percent per core",
677 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
682 "BriefDescription": "C7 residency percent per core",
683 "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100",
688 "BriefDescription": "C2 residency percent per package",
689 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100",
694 "BriefDescription": "C3 residency percent per package",
695 "MetricExpr": "(cstate_pkg@c3\\-residency@ / msr@tsc@) * 100",
700 "BriefDescription": "C6 residency percent per package",
701 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",
706 "BriefDescription": "C7 residency percent per package",
707 "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100",
712 "BriefDescription": "C8 residency percent per package",
713 "MetricExpr": "(cstate_pkg@c8\\-residency@ / msr@tsc@) * 100",
718 "BriefDescription": "C9 residency percent per package",
719 "MetricExpr": "(cstate_pkg@c9\\-residency@ / msr@tsc@) * 100",
724 "BriefDescription": "C10 residency percent per package",
725 "MetricExpr": "(cstate_pkg@c10\\-residency@ / msr@tsc@) * 100",