Lines Matching full:l3
89 …uction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node …
90 …uction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node …
95 …truction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node …
96 …truction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node …
149 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to an…
150 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 due to e…
156 "PublicDescription": "Inst from L3 miss"
161 …nstruction cache was reloaded from a localtion other than the local core's L3 due to a instruction…
162 …nstruction cache was reloaded from a localtion other than the local core's L3 due to either an ins…
167 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 with disp…
168 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 with dis…
173 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without d…
174 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without …
179 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without c…
180 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without …
203 …n cache was reloaded either shared or modified data from another core's L2/L3 on a different chip …
204 …n cache was reloaded either shared or modified data from another core's L2/L3 on a different chip …
209 …n cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due…
210 …n cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due…
215 …uction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or …
216 …uction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or …
221 …truction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or …
222 …truction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or …
293 …y was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node …
299 …try was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node …
341 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a inst…
347 …Entry was loaded into the TLB from a localtion other than the local core's L3 due to a instruction…
353 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch…
359 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispa…
365 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without confl…
389 … loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip …
395 … loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due…
401 …y was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or …
407 …try was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or …