Lines Matching +full:max +full:- +full:counts

44 .Bl -tag -width "Li PMC_CLASS_UCP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
67 Not all CPUs in this family implement fixed-function counters.
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
87 .Bl -tag -width indent
93 Configure the PMC to count the number of de-asserted to asserted
108 .Bl -tag -width indent
137 Counts the number of tread tracker allocate to deallocate entries.
142 Counts the number GQ read tracker entries for which a full cache line read
154 Counts the number of GQ read tracker entries that are allocated in the read
159 Counts the number of GQ read tracker entries that are allocated in the read
166 Counts the number of GQ write tracker entries that are allocated in the
173 Counts the number of GQ write tracker entries that are allocated in the write
179 Counts the number of GQ peer probe tracker (snoop) entries that are
307 Counts the number of L3 lines allocated in M state.
312 Counts the number of L3 lines allocated in E state.
315 Counts the number of L3 lines allocated in S state.
318 Counts the number of L3 lines allocated in F state.
321 Counts the number of L3 lines allocated in any state.
324 Counts the number of L3 lines victimized that were in the M state.
329 Counts the number of L3 lines victimized that were in the E state.
332 Counts the number of L3 lines victimized that were in the S state.
335 Counts the number of L3 lines victimized that were in the I state.
338 Counts the number of L3 lines victimized that were in the F state.
341 Counts the number of L3 lines victimized in any state.
344 Counts the number of remote snoops that have requested a cache line be set
348 Counts the number of remote snoops that have requested a cache line be set
352 Counts the number of remote snoops that have requested a cache line be set
357 Counts the number of remote snoops that have requested a cache line be set
362 Counts the number of remote snoops that have requested a cache line be set
367 Counts the number of remote snoops that have requested a cache line be set
372 Counts the number of remote snoops that have requested a cache line be set
377 Counts the number of remote snoops that have requested a cache line be set
382 Counts the number of remote snoops that have requested a cache line be set
387 Counts the number of remote snoops that have requested a cache line be set
392 Counts number of Quickpath Home Logic read requests from the IOH.
395 Counts number of Quickpath Home Logic write requests from the IOH.
398 Counts number of Quickpath Home Logic read requests from a remote socket.
401 Counts number of Quickpath Home Logic write requests from a remote socket.
404 Counts number of Quickpath Home Logic read requests from the local socket.
407 Counts number of Quickpath Home Logic write requests from the local socket.
410 Counts uclk cycles all entries in the Quickpath Home Logic IOH are full.
413 Counts uclk cycles all entries in the Quickpath Home Logic remote tracker
417 Counts uclk cycles all entries in the Quickpath Home Logic local tracker are
421 Counts uclk cycles all entries in the Quickpath Home Logic IOH is busy.
424 Counts uclk cycles all entries in the Quickpath Home Logic remote tracker is
428 Counts uclk cycles all entries in the Quickpath Home Logic local tracker is
441 Counts number of QHL Active Address Table (AAT) entries that saw a max of 2 conflicts.
447 Counts number of QHL Active Address Table (AAT) entries that saw a max of 3 conflicts.
453 Counts cycles the Quickpath Home Logic IOH Tracker contains two or more
455 A max of 3 requests can be in conflict.
458 Counts cycles the Quickpath Home Logic Remote Tracker contains two or more
460 A max of 3 requests can be in conflict.
463 Counts cycles the Quickpath Home Logic Local Tracker contains two or more
465 A max of 3 requests can be in conflict.
468 Counts number or requests to the Quickpath Memory Controller that bypass the
474 Counts cycles all the entries in the DRAM channel 0 high priority queue are
478 Counts cycles all the entries in the DRAM channel 1 high priority queue are
482 Counts cycles all the entries in the DRAM channel 2 high priority queue are
486 Counts cycles all the entries in the DRAM channel 0 high priority queue are
490 Counts cycles all the entries in the DRAM channel 1 high priority queue are
494 Counts cycles all the entries in the DRAM channel 2 high priority queue are
498 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
502 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
506 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
510 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
514 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
518 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
546 Counts the number of Quickpath Memory Controller channel 0 medium and low
552 Counts the number of Quickpath Memory Controller channel 1 medium and low
558 Counts the number of Quickpath Memory Controller channel 2 medium and low
564 Counts the number of Quickpath Memory Controller medium and low priority read requests.
569 Counts the number of Quickpath Memory Controller channel 0 high priority
573 Counts the number of Quickpath Memory Controller channel 1 high priority
577 Counts the number of Quickpath Memory Controller channel 2 high priority
581 Counts the number of Quickpath Memory Controller high priority isochronous
585 Counts the number of Quickpath Memory Controller channel 0 critical priority
589 Counts the number of Quickpath Memory Controller channel 1 critical priority
593 Counts the number of Quickpath Memory Controller channel 2 critical priority
597 Counts the number of Quickpath Memory Controller critical priority
601 Counts number of full cache line writes to DRAM channel 0.
604 Counts number of full cache line writes to DRAM channel 1.
607 Counts number of full cache line writes to DRAM channel 2.
610 Counts number of full cache line writes to DRAM.
613 Counts number of partial cache line writes to DRAM channel 0.
616 Counts number of partial cache line writes to DRAM channel 1.
619 Counts number of partial cache line writes to DRAM channel 2.
622 Counts number of partial cache line writes to DRAM.
625 Counts number of DRAM channel 0 cancel requests.
628 Counts number of DRAM channel 1 cancel requests.
631 Counts number of DRAM channel 2 cancel requests.
634 Counts number of DRAM cancel requests.
637 Counts number of DRAM channel 0 priority updates.
645 Counts number of DRAM channel 1 priority updates.
652 Counts number of DRAM channel 2 priority updates.
659 Counts number of DRAM priority updates.
666 Counts number of IMC DRAM channel 0 retries.
670 Counts number of IMC DRAM channel 1 retries.
674 Counts number of IMC DRAM channel 2 retries.
678 Counts number of IMC DRAM retries from any channel.
682 Counts number of Force Acknowledge Conflict messages sent by the Quickpath
686 Counts number of Force Acknowledge Conflict messages sent by the Quickpath
690 Counts number of Force Acknowledge Conflict messages sent by the Quickpath
694 Counts number of Force Acknowledge Conflict messages sent by the Quickpath
698 Counts number of occurrences a request was put to sleep due to IOH ordering
703 Counts number of occurrences a request was put to sleep due to remote socket
708 Counts number of occurrences a request was put to sleep due to local socket
713 Counts number of occurrences a request was put to sleep due to IOH address conflicts.
717 Counts number of occurrences a request was put to sleep due to remote socket
722 Counts number of occurrences a request was put to sleep due to local socket address conflicts.
726 Counts number of requests from the IOH, address/opcode of request is
734 Counts number of requests from the remote socket, address/opcode of request
742 Counts number of requests from the local socket, address/opcode of request
750 Counts cycles the Quickpath outbound link 0 HOME virtual channel is stalled
756 Counts cycles the Quickpath outbound link 0 SNOOP virtual channel is stalled
762 Counts cycles the Quickpath outbound link 0 non-data response virtual
768 Counts cycles the Quickpath outbound link 1 HOME virtual channel is stalled
774 Counts cycles the Quickpath outbound link 1 SNOOP virtual channel is stalled
780 Counts cycles the Quickpath outbound link 1 non-data response virtual
786 Counts cycles the Quickpath outbound link 0 virtual channels are stalled due
792 Counts cycles the Quickpath outbound link 1 virtual channels are stalled due
798 Counts cycles the Quickpath outbound link 0 Data ResponSe virtual channel is
804 Counts cycles the Quickpath outbound link 0 Non-Coherent Bypass virtual
810 Counts cycles the Quickpath outbound link 0 Non-Coherent Standard virtual
816 Counts cycles the Quickpath outbound link 1 Data ResponSe virtual channel is
822 Counts cycles the Quickpath outbound link 1 Non-Coherent Bypass virtual
828 Counts cycles the Quickpath outbound link 1 Non-Coherent Standard virtual
834 Counts cycles the Quickpath outbound link 0 virtual channels are stalled due
840 Counts cycles the Quickpath outbound link 1 virtual channels are stalled due
872 Counts number of DRAM Channel 0 open commands issued either for read or write.
876 Counts number of DRAM Channel 1 open commands issued either for read or write.
880 Counts number of DRAM Channel 2 open commands issued either for read or write.
896 Counts the number of precharges (PRE) that were issued to DRAM channel 0
904 Counts the number of precharges (PRE) that were issued to DRAM channel 1
912 Counts the number of precharges (PRE) that were issued to DRAM channel 2
920 Counts the number of times a read CAS command was issued on DRAM channel 0.
923 Counts the number of times a read CAS command was issued on DRAM channel 0
924 where the command issued used the auto-precharge (auto page close) mode.
927 Counts the number of times a read CAS command was issued on DRAM channel 1.
930 Counts the number of times a read CAS command was issued on DRAM channel 1
931 where the command issued used the auto-precharge (auto page close) mode.
934 Counts the number of times a read CAS command was issued on DRAM channel 2.
937 Counts the number of times a read CAS command was issued on DRAM channel 2
938 where the command issued used the auto-precharge (auto page close) mode.
941 Counts the number of times a write CAS command was issued on DRAM channel 0.
944 Counts the number of times a write CAS command was issued on DRAM channel 0
945 where the command issued used the auto-precharge (auto page close) mode.
948 Counts the number of times a write CAS command was issued on DRAM channel 1.
951 Counts the number of times a write CAS command was issued on DRAM channel 1
952 where the command issued used the auto-precharge (auto page close) mode.
955 Counts the number of times a write CAS command was issued on DRAM channel 2.
958 Counts the number of times a write CAS command was issued on DRAM channel 2
959 where the command issued used the auto-precharge (auto page close) mode.
962 Counts number of DRAM channel 0 refresh commands.
968 Counts number of DRAM channel 1 refresh commands.
973 Counts number of DRAM channel 2 refresh commands.
978 Counts number of DRAM Channel 0 precharge-all (PREALL) commands that close
983 Counts number of DRAM Channel 1 precharge-all (PREALL) commands that close
988 Counts number of DRAM Channel 2 precharge-all (PREALL) commands that close