Lines Matching +full:micro +full:- +full:tlb

45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
59 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
61 .%N "Order Number: 325462-045US"
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
87 .Bl -tag -width indent
89 Configure the Off-core Response bits.
90 .Bl -tag -width indent
128 M-state initial lookup stat in L3.
130 E-state.
132 S-state.
134 F-state.
138 No details on snoop-related information.
148 Hit denotes a cache-line was valid before snoop effect.
159 A snoop was needed and it HitM-ed in local or remote cache.
160 HitM denotes a cache-line was in modified state before effect as a results of snoop.
166 Target was non-DRAM system address.
174 Configure the PMC to count the number of de-asserted to asserted
201 .Bl -tag -width indent
208 Speculative cache-line split load uops dispatched to
212 Speculative cache-line split Store-address uops
220 Misses in all TLB levels that cause a page walk of any
225 that caused 4K page walks in any TLB levels.
229 that caused 2M/4M page walks in any TLB levels.
232 Completed page walks in any TLB of any page size
249 DTLB demand load misses with low part of linear-to-
264 Number of flags-merge uops allocated.
355 Miss in all TLB levels causes an page walk of any
360 more TLB levels of 4K page structure.
364 more TLB levels of 2M/4M page structure.
367 Completed page walks due to store miss in any TLB
380 Store operations that miss the first TLB level but hit
384 DTLB store misses with low part of linear-to-physical
388 Non-SW-prefetch load dispatches that hit fill buffer
392 Non-SW-prefetch load dispatches that hit fill buffer
583 Count number of non-delivered uops to RAT per
630 Cycles stalled due to re-order buffer full.
666 Counts total number of uops to be executed per-core
702 DTLB flush attempts of the thread-specific entries.
715 Number of transitions from AVX-256 to legacy SSE
719 Number of transitions from SSE to AVX-256 when
727 Counts the number of micro-ops retired, Use
740 Number of self-modifying-code machine clears
845 and cross-core snoop missed in on-pkg core cache.
849 cross-core snoop hits in on-pkg core cache.
864 Number of front end re-steers due to BPU
938 .An -nosplit