Lines Matching +full:read +full:- +full:1

6 .\" 1. Redistributions of source code must retain the above copyright
44 .Bl -tag -width "Li PMC_CLASS_UCP"
46 Fixed-function counters that count only one hardware event per counter.
58 .%B "Intel(R) 64 and IA-32 Architectures Software Developes Manual"
60 .%N "Order Number: 253669-033US"
69 .Bl -column "PMC_CAP_INTERRUPT" "Support"
86 .Bl -tag -width indent
92 Configure the PMC to count the number of de-asserted to asserted
107 .Bl -tag -width indent
110 Uncore cycles Global Queue read tracker is full.
120 Uncore cycles were Global Queue read tracker has at least one valid entry.
131 The GQ read tracker allocate to deallocate occupancy count is divided
132 by the count to obtain the average read tracker latency.
135 Counts the number GQ read tracker entries for which a full cache line read
137 The GQ read tracker L3 miss to fill occupancy count is divided by this count
138 to obtain the average cache line read L3 miss latency.
141 The time between a GQ read tracker allocation and the L3 determining that the
143 The total L3 cache line read miss latency is the hit latency + L3 miss
147 Counts the number of GQ read tracker entries that are allocated in the read
149 The GQ read tracker L3 hit occupancy count is divided by this count to obtain
153 Counts the number of GQ read tracker entries that are allocated in the read
155 The GQ read tracker L3 miss to RTID acquired occupancy count is
156 divided by this count to obtain the average latency for a read L3 miss to
197 Cycles GQ Core 1 and 3 input data port is busy importing data from processor
198 cores 1 and 3.
223 Number of responses to code or data read snoops to the local home that the
229 Number of responses to read invalidate snoops to the local home that the L3
238 Number of responses to code or data read snoops to the local home that the
250 Number of responses to code or data read snoops to a remote home that the L3
256 Number of responses to read invalidate snoops to a remote home that the L3
265 Number of responses to code or data read snoops to a remote home that the L3
270 .It Li L3_HITS.READ
272 Number of code read, data read and RFO requests that hit in the L3
283 .It Li L3_MISS.READ
285 Number of code read, data read and RFO requests that miss the L3.
301 was forwarded in M state is forwarded due to a Snoop Read Invalidate Own request.
332 .Pq Event 0BH , Umask 1FH
336 Counts number of Quickpath Home Logic read requests from the IOH.
342 Counts number of Quickpath Home Logic read requests from a remote socket.
348 Counts number of Quickpath Home Logic read requests from the local socket.
376 QHL IOH tracker allocate to deallocate read occupancy.
379 QHL remote tracker allocate to deallocate read occupancy.
382 QHL local tracker allocate to deallocate read occupancy.
417 For remote requests, only read requests can be bypassed.
418 .It Li QMC_NORMAL_FULL.READ.CH0
421 queue are occupied with read requests.
422 .It Li QMC_NORMAL_FULL.READ.CH1
424 Uncore cycles all the entries in the DRAM channel 1 medium or low priority
425 queue are occupied with read requests.
426 .It Li QMC_NORMAL_FULL.READ.CH2
429 queue are occupied with read requests.
436 Counts cycles all the entries in the DRAM channel 1 medium or low priority
442 .It Li QMC_ISOC_FULL.READ.CH0
445 occupied with isochronous read requests.
446 .It Li QMC_ISOC_FULL.READ.CH1
448 Counts cycles all the entries in the DRAM channel 1 high priority queue are
449 occupied with isochronous read requests.
450 .It Li QMC_ISOC_FULL.READ.CH2
453 occupied with isochronous read requests.
460 Counts cycles all the entries in the DRAM channel 1 high priority queue are
466 .It Li QMC_BUSY.READ.CH0
468 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
469 read request to DRAM channel 0.
470 .It Li QMC_BUSY.READ.CH1
472 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
473 read request to DRAM channel 1.
474 .It Li QMC_BUSY.READ.CH2
476 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
477 read request to DRAM channel 2.
480 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
484 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
485 write request to DRAM channel 1.
488 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
492 IMC channel 0 normal read request occupancy.
495 IMC channel 1 normal read request occupancy.
498 IMC channel 2 normal read request occupancy.
501 IMC channel 0 issoc read request occupancy.
504 IMC channel 1 issoc read request occupancy.
507 IMC channel 2 issoc read request occupancy.
510 IMC issoc read request occupancy.
514 priority read requests.
515 The QMC channel 0 normal read occupancy divided by this count provides the
516 average QMC channel 0 read latency.
519 Counts the number of Quickpath Memory Controller channel 1 medium and low
520 priority read requests.
521 The QMC channel 1 normal read occupancy divided by this count provides the
522 average QMC channel 1 read latency.
526 priority read requests.
527 The QMC channel 2 normal read occupancy divided by this count provides the
528 average QMC channel 2 read latency.
532 read requests.
533 The QMC normal read occupancy divided by this count provides the average
534 QMC read latency.
538 isochronous read requests.
541 Counts the number of Quickpath Memory Controller channel 1 high priority
542 isochronous read requests.
546 isochronous read requests.
550 read requests.
554 isochronous read requests.
557 Counts the number of Quickpath Memory Controller channel 1 critical priority
558 isochronous read requests.
562 isochronous read requests.
566 isochronous read requests.
572 Counts number of full cache line writes to DRAM channel 1.
584 Counts number of partial cache line writes to DRAM channel 1.
596 Counts number of DRAM channel 1 cancel requests.
612 Counts number of DRAM channel 1 priority updates.
649 Counts cycles the Quickpath outbound link 0 non-data response virtual
655 Counts cycles the Quickpath outbound link 1 HOME virtual channel is stalled
661 Counts cycles the Quickpath outbound link 1 SNOOP virtual channel is stalled
667 Counts cycles the Quickpath outbound link 1 non-data response virtual
679 Counts cycles the Quickpath outbound link 1 virtual channels are stalled due
691 Counts cycles the Quickpath outbound link 0 Non-Coherent Bypass virtual
697 Counts cycles the Quickpath outbound link 0 Non-Coherent Standard virtual
703 Counts cycles the Quickpath outbound link 1 Data ResponSe virtual channel is
709 Counts cycles the Quickpath outbound link 1 Non-Coherent Bypass virtual
715 Counts cycles the Quickpath outbound link 1 Non-Coherent Standard virtual
727 Counts cycles the Quickpath outbound link 1 virtual channels are stalled due
738 link 1 is busy.
747 1 are stalled and not sent to the GQ because the GQ Peer Probe Tracker (PPT)
751 Counts number of DRAM Channel 0 open commands issued either for read or write.
752 To read or write data, the referenced DRAM page must first be opened.
755 Counts number of DRAM Channel 1 open commands issued either for read or write.
756 To read or write data, the referenced DRAM page must first be opened.
759 Counts number of DRAM Channel 2 open commands issued either for read or write.
760 To read or write data, the referenced DRAM page must first be opened.
768 DRAM channel 1 command issued to CLOSE a page due to page idle timer
786 Counts the number of precharges (PRE) that were issued to DRAM channel 1
802 Counts the number of times a read CAS command was issued on DRAM channel 0.
805 Counts the number of times a read CAS command was issued on DRAM channel 0
806 where the command issued used the auto-precharge (auto page close) mode.
809 Counts the number of times a read CAS command was issued on DRAM channel 1.
812 Counts the number of times a read CAS command was issued on DRAM channel 1
813 where the command issued used the auto-precharge (auto page close) mode.
816 Counts the number of times a read CAS command was issued on DRAM channel 2.
819 Counts the number of times a read CAS command was issued on DRAM channel 2
820 where the command issued used the auto-precharge (auto page close) mode.
827 where the command issued used the auto-precharge (auto page close) mode.
830 Counts the number of times a write CAS command was issued on DRAM channel 1.
833 Counts the number of times a write CAS command was issued on DRAM channel 1
834 where the command issued used the auto-precharge (auto page close) mode.
841 where the command issued used the auto-precharge (auto page close) mode.
850 Counts number of DRAM channel 1 refresh commands.
862 Counts number of DRAM Channel 0 precharge-all (PREALL) commands that close
868 Counts number of DRAM Channel 1 precharge-all (PREALL) commands that close
874 Counts number of DRAM Channel 2 precharge-all (PREALL) commands that close