Lines Matching full:number
52 The number of PMCs available in each class and their widths need to be
60 .%N "Order Number: 253669-033US"
88 Configure the PMC to increment only if the number of configured
92 Configure the PMC to count the number of de-asserted to asserted
95 condition becomes true, irrespective of the number of clocks during
100 qualifier is present, making the counter increment when the number of
130 Counts the number of tread tracker allocate to deallocate entries.
135 Counts the number GQ read tracker entries for which a full cache line read
147 Counts the number of GQ read tracker entries that are allocated in the read
153 Counts the number of GQ read tracker entries that are allocated in the read
160 Counts the number of GQ write tracker entries that are allocated in the
167 Counts the number of GQ write tracker entries that are allocated in the
172 Counts the number of GQ peer probe tracker (snoop) entries that are
215 Number of snoop responses to the local home that L3 does not have the
219 Number of snoop responses to the local home that L3 has the referenced line
223 Number of responses to code or data read snoops to the local home that the
229 Number of responses to read invalidate snoops to the local home that the L3
235 Number of conflict snoop responses sent to the local home.
238 Number of responses to code or data read snoops to the local home that the
242 Number of snoop responses to a remote home that L3 does not have the
246 Number of snoop responses to a remote home that L3 has the referenced line
250 Number of responses to code or data read snoops to a remote home that the L3
256 Number of responses to read invalidate snoops to a remote home that the L3
262 Number of conflict snoop responses sent to the local home.
265 Number of responses to code or data read snoops to a remote home that the L3
269 Number of HITM snoop responses to a remote home
272 Number of code read, data read and RFO requests that hit in the L3
275 Number of writeback requests that hit in the L3.
279 Number of snoops from IOH or remote sockets that hit in the L3.
282 Number of reads and writes that hit the L3.
285 Number of code read, data read and RFO requests that miss the L3.
288 Number of writeback requests that miss the L3.
293 Number of snoops from IOH or remote sockets that miss the L3.
296 Number of reads and writes that miss the L3.
299 Counts the number of L3 lines allocated in M state.
304 Counts the number of L3 lines allocated in E state.
307 Counts the number of L3 lines allocated in S state.
310 Counts the number of L3 lines allocated in F state.
313 Counts the number of L3 lines allocated in any state.
316 Counts the number of L3 lines victimized that were in the M state.
321 Counts the number of L3 lines victimized that were in the E state.
324 Counts the number of L3 lines victimized that were in the S state.
327 Counts the number of L3 lines victimized that were in the I state.
330 Counts the number of L3 lines victimized that were in the F state.
333 Counts the number of L3 lines victimized in any state.
336 Counts number of Quickpath Home Logic read requests from the IOH.
339 Counts number of Quickpath Home Logic write requests from the IOH.
342 Counts number of Quickpath Home Logic read requests from a remote socket.
345 Counts number of Quickpath Home Logic write requests from a remote socket.
348 Counts number of Quickpath Home Logic read requests from the local socket.
351 Counts number of Quickpath Home Logic write requests from the local socket.
385 Counts number of QHL Active Address Table (AAT) entries that saw a max of 2
392 Counts number of QHL Active Address Table (AAT) entries that saw a max of 3
414 Counts number or requests to the Quickpath Memory Controller that bypass the
513 Counts the number of Quickpath Memory Controller channel 0 medium and low
519 Counts the number of Quickpath Memory Controller channel 1 medium and low
525 Counts the number of Quickpath Memory Controller channel 2 medium and low
531 Counts the number of Quickpath Memory Controller medium and low priority
537 Counts the number of Quickpath Memory Controller channel 0 high priority
541 Counts the number of Quickpath Memory Controller channel 1 high priority
545 Counts the number of Quickpath Memory Controller channel 2 high priority
549 Counts the number of Quickpath Memory Controller high priority isochronous
553 Counts the number of Quickpath Memory Controller channel 0 critical priority
557 Counts the number of Quickpath Memory Controller channel 1 critical priority
561 Counts the number of Quickpath Memory Controller channel 2 critical priority
565 Counts the number of Quickpath Memory Controller critical priority
569 Counts number of full cache line writes to DRAM channel 0.
572 Counts number of full cache line writes to DRAM channel 1.
575 Counts number of full cache line writes to DRAM channel 2.
578 Counts number of full cache line writes to DRAM.
581 Counts number of partial cache line writes to DRAM channel 0.
584 Counts number of partial cache line writes to DRAM channel 1.
587 Counts number of partial cache line writes to DRAM channel 2.
590 Counts number of partial cache line writes to DRAM.
593 Counts number of DRAM channel 0 cancel requests.
596 Counts number of DRAM channel 1 cancel requests.
599 Counts number of DRAM channel 2 cancel requests.
602 Counts number of DRAM cancel requests.
605 Counts number of DRAM channel 0 priority updates.
612 Counts number of DRAM channel 1 priority updates.
619 Counts number of DRAM channel 2 priority updates.
626 Counts number of DRAM priority updates.
633 Counts number of Force Acknowledge Conflict messages sent by the Quickpath
733 Number of cycles that the header buffer in the Quickpath Interface outbound
737 Number of cycles that the header buffer in the Quickpath Interface outbound
741 Number of cycles that snoop packets incoming to the Quickpath Interface link
746 Number of cycles that snoop packets incoming to the Quickpath Interface link
751 Counts number of DRAM Channel 0 open commands issued either for read or write.
755 Counts number of DRAM Channel 1 open commands issued either for read or write.
759 Counts number of DRAM Channel 2 open commands issued either for read or write.
778 Counts the number of precharges (PRE) that were issued to DRAM channel 0
786 Counts the number of precharges (PRE) that were issued to DRAM channel 1
794 Counts the number of precharges (PRE) that were issued to DRAM channel 2
802 Counts the number of times a read CAS command was issued on DRAM channel 0.
805 Counts the number of times a read CAS command was issued on DRAM channel 0
809 Counts the number of times a read CAS command was issued on DRAM channel 1.
812 Counts the number of times a read CAS command was issued on DRAM channel 1
816 Counts the number of times a read CAS command was issued on DRAM channel 2.
819 Counts the number of times a read CAS command was issued on DRAM channel 2
823 Counts the number of times a write CAS command was issued on DRAM channel 0.
826 Counts the number of times a write CAS command was issued on DRAM channel 0
830 Counts the number of times a write CAS command was issued on DRAM channel 1.
833 Counts the number of times a write CAS command was issued on DRAM channel 1
837 Counts the number of times a write CAS command was issued on DRAM channel 2.
840 Counts the number of times a write CAS command was issued on DRAM channel 2
844 Counts number of DRAM channel 0 refresh commands.
850 Counts number of DRAM channel 1 refresh commands.
856 Counts number of DRAM channel 2 refresh commands.
862 Counts number of DRAM Channel 0 precharge-all (PREALL) commands that close
868 Counts number of DRAM Channel 1 precharge-all (PREALL) commands that close
874 Counts number of DRAM Channel 2 precharge-all (PREALL) commands that close