Lines Matching full:counts
130 Counts the number of tread tracker allocate to deallocate entries.
135 Counts the number GQ read tracker entries for which a full cache line read
147 Counts the number of GQ read tracker entries that are allocated in the read
153 Counts the number of GQ read tracker entries that are allocated in the read
160 Counts the number of GQ write tracker entries that are allocated in the
167 Counts the number of GQ write tracker entries that are allocated in the
172 Counts the number of GQ peer probe tracker (snoop) entries that are
299 Counts the number of L3 lines allocated in M state.
304 Counts the number of L3 lines allocated in E state.
307 Counts the number of L3 lines allocated in S state.
310 Counts the number of L3 lines allocated in F state.
313 Counts the number of L3 lines allocated in any state.
316 Counts the number of L3 lines victimized that were in the M state.
321 Counts the number of L3 lines victimized that were in the E state.
324 Counts the number of L3 lines victimized that were in the S state.
327 Counts the number of L3 lines victimized that were in the I state.
330 Counts the number of L3 lines victimized that were in the F state.
333 Counts the number of L3 lines victimized in any state.
336 Counts number of Quickpath Home Logic read requests from the IOH.
339 Counts number of Quickpath Home Logic write requests from the IOH.
342 Counts number of Quickpath Home Logic read requests from a remote socket.
345 Counts number of Quickpath Home Logic write requests from a remote socket.
348 Counts number of Quickpath Home Logic read requests from the local socket.
351 Counts number of Quickpath Home Logic write requests from the local socket.
354 Counts uclk cycles all entries in the Quickpath Home Logic IOH are full.
357 Counts uclk cycles all entries in the Quickpath Home Logic remote tracker
361 Counts uclk cycles all entries in the Quickpath Home Logic local tracker are
365 Counts uclk cycles all entries in the Quickpath Home Logic IOH is busy.
368 Counts uclk cycles all entries in the Quickpath Home Logic remote tracker is
372 Counts uclk cycles all entries in the Quickpath Home Logic local tracker is
385 Counts number of QHL Active Address Table (AAT) entries that saw a max of 2
392 Counts number of QHL Active Address Table (AAT) entries that saw a max of 3
399 Counts cycles the Quickpath Home Logic IOH Tracker contains two or more
404 Counts cycles the Quickpath Home Logic Remote Tracker contains two or more
409 Counts cycles the Quickpath Home Logic Local Tracker contains two or more
414 Counts number or requests to the Quickpath Memory Controller that bypass the
436 Counts cycles all the entries in the DRAM channel 1 medium or low priority
444 Counts cycles all the entries in the DRAM channel 0 high priority queue are
448 Counts cycles all the entries in the DRAM channel 1 high priority queue are
452 Counts cycles all the entries in the DRAM channel 2 high priority queue are
456 Counts cycles all the entries in the DRAM channel 0 high priority queue are
460 Counts cycles all the entries in the DRAM channel 1 high priority queue are
464 Counts cycles all the entries in the DRAM channel 2 high priority queue are
468 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
472 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
476 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
480 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
484 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
488 Counts cycles where Quickpath Memory Controller has at least 1 outstanding
513 Counts the number of Quickpath Memory Controller channel 0 medium and low
519 Counts the number of Quickpath Memory Controller channel 1 medium and low
525 Counts the number of Quickpath Memory Controller channel 2 medium and low
531 Counts the number of Quickpath Memory Controller medium and low priority
537 Counts the number of Quickpath Memory Controller channel 0 high priority
541 Counts the number of Quickpath Memory Controller channel 1 high priority
545 Counts the number of Quickpath Memory Controller channel 2 high priority
549 Counts the number of Quickpath Memory Controller high priority isochronous
553 Counts the number of Quickpath Memory Controller channel 0 critical priority
557 Counts the number of Quickpath Memory Controller channel 1 critical priority
561 Counts the number of Quickpath Memory Controller channel 2 critical priority
565 Counts the number of Quickpath Memory Controller critical priority
569 Counts number of full cache line writes to DRAM channel 0.
572 Counts number of full cache line writes to DRAM channel 1.
575 Counts number of full cache line writes to DRAM channel 2.
578 Counts number of full cache line writes to DRAM.
581 Counts number of partial cache line writes to DRAM channel 0.
584 Counts number of partial cache line writes to DRAM channel 1.
587 Counts number of partial cache line writes to DRAM channel 2.
590 Counts number of partial cache line writes to DRAM.
593 Counts number of DRAM channel 0 cancel requests.
596 Counts number of DRAM channel 1 cancel requests.
599 Counts number of DRAM channel 2 cancel requests.
602 Counts number of DRAM cancel requests.
605 Counts number of DRAM channel 0 priority updates.
612 Counts number of DRAM channel 1 priority updates.
619 Counts number of DRAM channel 2 priority updates.
626 Counts number of DRAM priority updates.
633 Counts number of Force Acknowledge Conflict messages sent by the Quickpath
637 Counts cycles the Quickpath outbound link 0 HOME virtual channel is stalled
643 Counts cycles the Quickpath outbound link 0 SNOOP virtual channel is stalled
649 Counts cycles the Quickpath outbound link 0 non-data response virtual
655 Counts cycles the Quickpath outbound link 1 HOME virtual channel is stalled
661 Counts cycles the Quickpath outbound link 1 SNOOP virtual channel is stalled
667 Counts cycles the Quickpath outbound link 1 non-data response virtual
673 Counts cycles the Quickpath outbound link 0 virtual channels are stalled due
679 Counts cycles the Quickpath outbound link 1 virtual channels are stalled due
685 Counts cycles the Quickpath outbound link 0 Data ResponSe virtual channel is
691 Counts cycles the Quickpath outbound link 0 Non-Coherent Bypass virtual
697 Counts cycles the Quickpath outbound link 0 Non-Coherent Standard virtual
703 Counts cycles the Quickpath outbound link 1 Data ResponSe virtual channel is
709 Counts cycles the Quickpath outbound link 1 Non-Coherent Bypass virtual
715 Counts cycles the Quickpath outbound link 1 Non-Coherent Standard virtual
721 Counts cycles the Quickpath outbound link 0 virtual channels are stalled due
727 Counts cycles the Quickpath outbound link 1 virtual channels are stalled due
751 Counts number of DRAM Channel 0 open commands issued either for read or write.
755 Counts number of DRAM Channel 1 open commands issued either for read or write.
759 Counts number of DRAM Channel 2 open commands issued either for read or write.
778 Counts the number of precharges (PRE) that were issued to DRAM channel 0
786 Counts the number of precharges (PRE) that were issued to DRAM channel 1
794 Counts the number of precharges (PRE) that were issued to DRAM channel 2
802 Counts the number of times a read CAS command was issued on DRAM channel 0.
805 Counts the number of times a read CAS command was issued on DRAM channel 0
809 Counts the number of times a read CAS command was issued on DRAM channel 1.
812 Counts the number of times a read CAS command was issued on DRAM channel 1
816 Counts the number of times a read CAS command was issued on DRAM channel 2.
819 Counts the number of times a read CAS command was issued on DRAM channel 2
823 Counts the number of times a write CAS command was issued on DRAM channel 0.
826 Counts the number of times a write CAS command was issued on DRAM channel 0
830 Counts the number of times a write CAS command was issued on DRAM channel 1.
833 Counts the number of times a write CAS command was issued on DRAM channel 1
837 Counts the number of times a write CAS command was issued on DRAM channel 2.
840 Counts the number of times a write CAS command was issued on DRAM channel 2
844 Counts number of DRAM channel 0 refresh commands.
850 Counts number of DRAM channel 1 refresh commands.
856 Counts number of DRAM channel 2 refresh commands.
862 Counts number of DRAM Channel 0 precharge-all (PREALL) commands that close
868 Counts number of DRAM Channel 1 precharge-all (PREALL) commands that close
874 Counts number of DRAM Channel 2 precharge-all (PREALL) commands that close