Lines Matching full:phase
196 /* set up multi-phase copy parameters */
213 std %r7, -32(%r1) /* bytes to copy in phase 1 */
214 std %r10, -40(%r1) /* BLOCKS to copy in phase 2 */
215 std %r9, -48(%r1) /* bytes to copy in phase 3 */
218 li %r5, BLOCK_SIZE /* increment for phase 2 */
220 /* op offsets for phase 2 */
233 std %r9, -32(%r1) /* bytes to copy in phase 1 */
234 std %r10, -40(%r1) /* BLOCKS to copy in phase 2 */
235 std %r7, -48(%r1) /* bytes to copy in phase 3 */
239 li %r5, -BLOCK_SIZE /* increment for phase 2 */
244 /* op offsets for phase 2 */
255 ld %r6, -32(%r1) /* bytes to copy in phase 1 */
256 cmpldi %r6, 0 /* r6 == 0? skip phase 1 */
263 add %r4, %r4, %r0 /* phase 1 increment */
265 add %r3, %r3, %r0 /* phase 1 increment */
269 ld %r6, -40(%r1) /* BLOCKS to copy in phase 2 */
270 cmpldi %r6, 0 /* %r6 == 0? skip phase 2 */
312 add %r4, %r4, %r5 /* phase 2 increment */
313 add %r3, %r3, %r5 /* phase 2 increment */
329 /* load registers for transitioning into the single-phase logic */
330 ld %r5, -48(%r1) /* bytes to copy in phase 3 */