Lines Matching +full:mode +full:-
2 # Copyright 2011-2023 The OpenSSL Project Authors. All Rights Reserved.
19 # Assembler helpers for Padlock engine. See even e_padlock-x86.pl for
30 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
31 ( $xlate="${dir}../../crypto/perlasm/x86_64-xlate.pl" and -f $xlate) or
32 die "can't locate x86_64-xlate.pl";
54 .type padlock_capability,\@abi-omnipotent
90 .size padlock_capability,.-padlock_capability
93 .type padlock_key_bswap,\@abi-omnipotent,0
107 .size padlock_key_bswap,.-padlock_key_bswap
110 .type padlock_verify_context,\@abi-omnipotent
119 .size padlock_verify_context,.-padlock_verify_context
121 .type _padlock_verify_ctx,\@abi-omnipotent
134 .size _padlock_verify_ctx,.-_padlock_verify_ctx
137 .type padlock_reload_key,\@abi-omnipotent
143 .size padlock_reload_key,.-padlock_reload_key
156 .size padlock_aes_block,.-padlock_aes_block
165 .size padlock_xstore,.-padlock_xstore
173 movups (%rdi),%xmm0 # copy-in context
184 movups %xmm0,(%rdx) # copy-out context
187 .size padlock_sha1_oneshot,.-padlock_sha1_oneshot
195 movups (%rdi),%xmm0 # copy-in context
201 mov \$-1,%rax
206 movups %xmm0,(%rdx) # copy-out context
209 .size padlock_sha1_blocks,.-padlock_sha1_blocks
217 movups (%rdi),%xmm0 # copy-in context
228 movups %xmm0,(%rdx) # copy-out context
231 .size padlock_sha256_oneshot,.-padlock_sha256_oneshot
239 movups (%rdi),%xmm0 # copy-in context
245 mov \$-1,%rax
250 movups %xmm0,(%rdx) # copy-out context
253 .size padlock_sha256_blocks,.-padlock_sha256_blocks
261 movups (%rdi),%xmm0 # copy-in context
277 movups %xmm0,(%rdx) # copy-out context
282 .size padlock_sha512_blocks,.-padlock_sha512_blocks
286 my ($mode,$opcode) = @_;
290 .globl padlock_${mode}_encrypt
291 .type padlock_${mode}_encrypt,\@function,4
293 padlock_${mode}_encrypt:
299 jnz .L${mode}_abort
301 jnz .L${mode}_abort
310 jnz .L${mode}_aligned
316 jnz .L${mode}_aligned
319 not %rax # out_misaligned?-1:0
326 and \$$PADLOCK_CHUNK-1,$chunk # chunk%=PADLOCK_CHUNK
331 $code.=<<___ if ($mode eq "ctr32");
332 .L${mode}_reenter:
333 mov -4($ctx),%eax # pull 32-bit counter
336 and \$`$PADLOCK_CHUNK/16-1`,%eax
344 $code.=<<___ if ($PADLOCK_PREFETCH{$mode});
346 ja .L${mode}_loop
353 cmp \$$PADLOCK_PREFETCH{$mode},%rax
354 mov \$-$PADLOCK_PREFETCH{$mode},%rax
355 cmovae $chunk,%rax # mask=distance<prefetch?-prefetch:-1
357 jz .L${mode}_unaligned_tail
360 jmp .L${mode}_loop
362 .L${mode}_loop:
373 jz .L${mode}_inp_aligned
379 .L${mode}_inp_aligned:
380 lea -16($ctx),%rax # ivp
385 $code.=<<___ if ($mode !~ /ecb|ctr/);
387 movdqa %xmm0,-16($ctx) # copy [or refresh] iv
389 $code.=<<___ if ($mode eq "ctr32");
390 mov -4($ctx),%eax # pull 32-bit counter
392 jnz .L${mode}_no_carry
396 mov %eax,-4($ctx)
397 .L${mode}_no_carry:
403 jz .L${mode}_out_aligned
409 .L${mode}_out_aligned:
417 if (!$PADLOCK_PREFETCH{$mode}) {
419 jnz .L${mode}_loop
423 jz .L${mode}_break
425 jae .L${mode}_loop
427 $code.=<<___ if ($mode eq "ctr32");
435 cmp \$$PADLOCK_PREFETCH{$mode},%rax
436 mov \$-$PADLOCK_PREFETCH{$mode},%rax
439 jnz .L${mode}_loop
442 .L${mode}_unaligned_tail:
455 jmp .L${mode}_loop
457 .L${mode}_break:
462 je .L${mode}_done
466 .L${mode}_bzero:
470 ja .L${mode}_bzero
472 .L${mode}_done:
474 jmp .L${mode}_exit
477 .L${mode}_aligned:
479 $code.=<<___ if ($mode eq "ctr32");
480 mov -4($ctx),%eax # pull 32-bit counter
490 jbe .L${mode}_aligned_skip
492 .L${mode}_aligned_loop:
497 lea -16($ctx),%rax # ivp
502 mov -4($ctx),%eax # pull 32-bit counter
506 mov %eax,-4($ctx)
511 jz .L${mode}_exit
513 jae .L${mode}_aligned_loop
515 .L${mode}_aligned_skip:
517 $code.=<<___ if ($PADLOCK_PREFETCH{$mode});
522 cmp \$$PADLOCK_PREFETCH{$mode},%rbp
523 mov \$$PADLOCK_PREFETCH{$mode}-1,%rbp
527 jz .L${mode}_aligned_tail
530 lea -16($ctx),%rax # ivp
535 $code.=<<___ if ($mode !~ /ecb|ctr/);
537 movdqa %xmm0,-16($ctx) # copy [or refresh] iv
539 $code.=<<___ if ($PADLOCK_PREFETCH{$mode});
541 jz .L${mode}_exit
543 .L${mode}_aligned_tail:
555 jmp .L${mode}_loop
558 .L${mode}_exit:
561 .L${mode}_abort:
565 .size padlock_${mode}_encrypt,.-padlock_${mode}_encrypt
573 &generate_mode("ctr32",0xd8); # all 64-bit CPUs have working CTR...