Lines Matching +full:port +full:- +full:mapping

18 #include "netdissect-stdinc.h"
38     { GMPLS_PSC1, "Packet-Switch Capable-1"},
39     { GMPLS_PSC2, "Packet-Switch Capable-2"},
40     { GMPLS_PSC3, "Packet-Switch Capable-3"},
41     { GMPLS_PSC4, "Packet-Switch Capable-4"},
42     { GMPLS_L2SC, "Layer-2 Switch Capable"},
43     { GMPLS_TSC, "Time-Division-Multiplex"},
44     { GMPLS_LSC, "Lambda-Switch Capable"},
45     { GMPLS_FSC, "Fiber-Switch Capable"},
62     { 5,    "SDH ITU-T G.707/SONET ANSI T1.105"},
79     {  5,   "Asynchronous mapping of E4"},
80     {  6,   "Asynchronous mapping of DS3/T3"},
81     {  7,   "Asynchronous mapping of E3"},
82     {  8,   "Bit synchronous mapping of E3"},
83     {  9,   "Byte synchronous mapping of E3"},
84     { 10,   "Asynchronous mapping of DS2/T2"},
85     { 11,   "Bit synchronous mapping of DS2/T2"},
87     { 13,   "Asynchronous mapping of E1"},
88     { 14,   "Byte synchronous mapping of E1"},
89     { 15,   "Byte synchronous mapping of 31 * DS0"},
90     { 16,   "Asynchronous mapping of DS1/T1"},
91     { 17,   "Bit synchronous mapping of DS1/T1"},
92     { 18,   "Byte synchronous mapping of DS1/T1"},
93     { 19,   "VC-11 in VC-12"},
99     { 25,   "DS3 C-Bit Parity Asynchronous"},
102     { 28,   "POS - No Scrambling, 16 bit CRC"},
103     { 29,   "POS - No Scrambling, 32 bit CRC"},
104     { 30,   "POS - Scrambling, 16 bit CRC"},
105     { 31,   "POS - Scrambling, 32 bit CRC"},
106     { 32,   "ATM mapping"},
117     { 43,   "FiberChannel-3 (Services)"},
121 /* draft-ietf-ccamp-gmpls-g709-04.txt */
139  * Port Service Attributes Object). See UNI 1.0 section 9.4.2 for details.
142     { 5, "SDH ITU-T G.707"},
149  * the Client Port Service Attributes Object). See UNI 1.0 section 9.4.2 for
153     { 5,  "VC-3"},
154     { 6,  "VC-4"},
155     { 7,  "STM-0"},
156     { 8,  "STM-1"},
157     { 9,  "STM-4"},
158     { 10, "STM-16"},
159     { 11, "STM-64"},
160     { 12, "STM-256"},
166  * the Client Port Service Attributes Object). See UNI 1.0 section 9.4.2 for
170     { 5,  "STS-1 SPE"},
171     { 6,  "STS-3c SPE"},
172     { 7,  "STS-1"},
173     { 8,  "STM-3"},
174     { 9,  "STM-12"},
175     { 10, "STM-48"},
176     { 11, "STM-192"},
177     { 12, "STM-768"},
181 #define DIFFSERV_BC_MODEL_RDM           0   /* draft-ietf-tewg-diff-te-proto-07 */
182 #define DIFFSERV_BC_MODEL_MAM           1   /* draft-ietf-tewg-diff-te-proto-07 */
188     {  DIFFSERV_BC_MODEL_EXTD_MAM, "Maximum allocation with E-LSP support"},