Lines Matching refs:nMem
16745 u16 nMem; /* Number of aMem[] value. Might be zero */ member
16965 int nMem; /* Number of memory cells required */ member
20284 int nMem; /* Number of memory cells used so far */ member
23792 int nMem; /* Number of entries in aMem */ member
24044 int nMem; /* Number of memory locations currently allocated */ member
81012 if( pX->nMem ){
81016 r.nField = pX->nMem;
84886 for(i=1, pX=pVdbe->aMem+1; i<pVdbe->nMem; i++, pX++){
87406 assert( iFirst+N-1<=pParse->nMem );
88331 assert( p->nMem>9 );
88500 for(i=0; i<p->nMem; i++){
88544 int nMem; /* Number of VM memory registers */ local
88561 nMem = pParse->nMem;
88570 nMem += nCursor;
88571 if( nCursor==0 && nMem>0 ) nMem++; /* Space for aMem[0] even if not used */
88587 if( nMem<10 ) nMem = 10;
88604 p->aMem = allocSpace(&x, 0, nMem*sizeof(Mem));
88612 p->aMem = allocSpace(&x, p->aMem, nMem*sizeof(Mem));
88625 p->nMem = 0;
88630 p->nMem = nMem;
88631 initMemArray(p->aMem, nMem, db, MEM_Undefined);
88709 v->nMem = pFrame->nMem;
88739 releaseMemArray(p->aMem, p->nMem);
89505 for(i=0; i<p->nMem; i++) assert( p->aMem[i].flags==MEM_Undefined );
93479 }else if( v->nMem>=10 && (eMode!=2 || v->haveEqpOps) ){
94617 Mem *pMem = iCur>0 ? &p->aMem[p->nMem-iCur] : p->aMem;
94970 for(i=1; i<v->nMem; i++) registerTrace(i, v->aMem+i);
95013 assert( pOp->p2<=(p->nMem+1 - p->nCursor) );
95287 assert( pOp->p1<=(p->nMem+1 - p->nCursor) );
95294 assert( pOp->p2<=(p->nMem+1 - p->nCursor) );
95301 assert( pOp->p3<=(p->nMem+1 - p->nCursor) );
95308 assert( pOp->p2<=(p->nMem+1 - p->nCursor) );
95313 assert( pOp->p3<=(p->nMem+1 - p->nCursor) );
95428 assert( pOp->p1>0 && pOp->p1<=(p->nMem+1 - p->nCursor) );
95483 assert( pOp->p1>0 && pOp->p1<=(p->nMem+1 - p->nCursor) );
95643 assert( pOp->p3<=(p->nMem + 1 - p->nCursor) );
95777 assert( pOp->p3<=(p->nMem+1 - p->nCursor) );
95826 assert( pOp->p3<=(p->nMem+1 - p->nCursor) );
95852 assert( pOp->p1>0 && pOp->p1<=(p->nMem+1 - p->nCursor) );
95924 assert( pOut<=&aMem[(p->nMem+1 - p->nCursor)] );
95925 assert( pIn1<=&aMem[(p->nMem+1 - p->nCursor)] );
95932 for(i=1; i<p->nMem; i++){
96058 assert( pOp->p1+pOp->p2<=(p->nMem+1 - p->nCursor)+1 );
96825 assert( p1>0 && p1+mx<=(p->nMem+1 - p->nCursor)+1 );
96826 assert( p2>0 && p2+mx<=(p->nMem+1 - p->nCursor)+1 );
96828 assert( p1>0 && p1+n<=(p->nMem+1 - p->nCursor)+1 );
96829 assert( p2>0 && p2+n<=(p->nMem+1 - p->nCursor)+1 );
97110 assert( pOp->p1>=0 || (pOp->p3>=0 && pOp->p3<=(p->nMem+1 - p->nCursor)) );
97296 assert( pOp->p3>0 && pOp->p3<=(p->nMem+1 - p->nCursor) );
97696 assert( pIn1 <= &p->aMem[(p->nMem+1 - p->nCursor)] );
97788 assert( nField>0 && pOp->p2>0 && pOp->p2+nField<=(p->nMem+1 - p->nCursor)+1 );
98065 assert( pOp->p3>0 && pOp->p3<=(p->nMem+1 - p->nCursor) );
98700 assert( p2<=(u32)(p->nMem+1 - p->nCursor) );
99942 assert( pOp->p3<=pFrame->nMem );
99946 assert( pOp->p3<=(p->nMem+1 - p->nCursor) );
100846 x.nMem = (u16)pOp->p4.i;
100904 assert( pOp->p2>0 && pOp->p2+pOp->p3<=(p->nMem+1 - p->nCursor)+1 );
101528 assert( pOp->p1>0 && (pOp->p1+1)<=(p->nMem+1 - p->nCursor) );
101674 int nMem; /* Number of memory registers for sub-program */
101720 nMem = pProgram->nMem + pProgram->nCsr;
101721 assert( nMem>0 );
101722 if( pProgram->nCsr==0 ) nMem++;
101724 + nMem * sizeof(Mem)
101738 pFrame->nChildMem = nMem;
101742 pFrame->nMem = p->nMem;
101760 assert( pProgram->nMem+pProgram->nCsr==pFrame->nChildMem
101761 || (pProgram->nCsr==0 && pProgram->nMem+1==pFrame->nChildMem) );
101777 p->nMem = pFrame->nChildMem;
101779 p->apCsr = (VdbeCursor **)&aMem[p->nMem];
101789 for(i=0; i<p->nMem; i++){
102044 assert( pOp->p3>0 && pOp->p3<=(p->nMem+1 - p->nCursor) );
102045 assert( n==0 || (pOp->p2>0 && pOp->p2+n<=(p->nMem+1 - p->nCursor)+1) );
102177 assert( pOp->p1>0 && pOp->p1<=(p->nMem+1 - p->nCursor) );
102754 assert( pOp->p3>0 && pOp->p3<=(p->nMem+1 - p->nCursor) );
103149 assert( pOp->p1>0 && pOp->p1<=(p->nMem+1 - p->nCursor) );
103185 assert( pOp->p1>0 && pOp->p1<=(p->nMem+1 - p->nCursor) );
103383 assert( pOp->p1+pOp->p2<=(p->nMem+1 - p->nCursor)+1 );
103901 sParse.nMem = 1;
113643 *prRhsHasNull = ++pParse->nMem;
113682 *prRhsHasNull = rMayHaveNull = ++pParse->nMem;
113910 pExpr->y.sub.regReturn = ++pParse->nMem;
113966 int regBloom = ++pParse->nMem;
114119 pExpr->y.sub.regReturn = ++pParse->nMem;
114151 sqlite3SelectDestInit(&dest, 0, pParse->nMem+1);
114152 pParse->nMem += nReg;
114756 iResult = pParse->nMem+1;
114757 pParse->nMem += nResult;
115077 assert( target>0 && target<=pParse->nMem );
115498 r1 = pParse->nMem+1;
115499 pParse->nMem += nFarg;
115917 if( regDest<0 ) regDest = ++pParse->nMem;
115928 if( regDest<0 ) regDest = ++pParse->nMem;
116000 assert( target>0 && target<=pParse->nMem );
117645 return ++pParse->nMem;
117675 i = pParse->nMem+1;
117676 pParse->nMem += nReg;
117710 if( pParse->nMem<iReg ) pParse->nMem = iReg;
118043 int i = ++pParse->nMem;
120024 reg = ++pParse->nMem;
120027 pParse->nMem += pTab->nCol;
120030 pParse->nMem += pPk->nColumn;
120036 regRec = ++pParse->nMem;
120063 pParse->nMem++;
121506 iMem = pParse->nMem+1;
121541 analyzeOneTable(pParse, pTab, pOnlyIdx, iStatCur,pParse->nMem+1,pParse->nTab);
124174 int iReg = ++pParse->nMem;
124337 reg1 = pParse->u1.cr.regRowid = ++pParse->nMem;
124338 reg2 = pParse->u1.cr.regRoot = ++pParse->nMem;
124339 reg3 = ++pParse->nMem;
125838 regYield = ++pParse->nMem;
125839 regRec = ++pParse->nMem;
125840 regRowid = ++pParse->nMem;
127411 int iMem = ++pParse->nMem;
129801 memCnt = ++pParse->nMem;
129849 iRowSet = ++pParse->nMem;
129857 iPk = pParse->nMem+1;
129858 pParse->nMem += nPk;
129897 iKey = ++pParse->nMem;
129920 iKey = ++pParse->nMem;
130138 iOld = pParse->nMem+1;
130139 pParse->nMem += (1 + pTab->nCol);
135258 pToplevel->nMem++; /* Register to hold name of table */
135259 pInfo->regCtr = ++pToplevel->nMem; /* Max rowid register */
135260 pToplevel->nMem +=2; /* Rowid in sqlite_sequence + orig max val */
135551 pSubq->regReturn = ++pParse->nMem;
135561 dest.iSdst = pParse->nMem + 3;
135563 pParse->nMem += 2 + dest.nSdst;
135860 regRowid = regIns = pParse->nMem+1;
135861 pParse->nMem += pTab->nCol + 1;
135864 pParse->nMem++;
135952 int regYield = ++pParse->nMem;
136079 regRowCount = ++pParse->nMem;
136094 aRegIdx[i] = ++pParse->nMem;
136095 pParse->nMem += pIdx->nColumn;
136097 aRegIdx[i] = ++pParse->nMem; /* Register to store the table record */
137041 regTrigCnt = ++pParse->nMem;
141098 pParse->nMem = 2;
141221 pParse->nMem += 2;
141319 iReg = ++pParse->nMem;
141872 pParse->nMem = 7;
141929 pParse->nMem = 6;
141998 pParse->nMem = 5;
142041 pParse->nMem = 6;
142045 pParse->nMem = 3;
142049 assert( pParse->nMem<=pPragma->nPragCName );
142060 sqlite3VdbeAddOp2(v, OP_ResultRow, 1, pParse->nMem);
142073 pParse->nMem = 5;
142090 pParse->nMem = 3;
142105 pParse->nMem = 2;
142119 pParse->nMem = 6;
142137 pParse->nMem = 1;
142167 pParse->nMem = 8;
142208 regResult = pParse->nMem+1;
142209 pParse->nMem += 4;
142210 regRow = ++pParse->nMem;
142367 pParse->nMem = 6;
142506 assert( pParse->nMem>=8+j );
143017 pParse->nMem = 1;
143045 pParse->nMem = 3;
143386 pParse->nMem = 2;
145555 int regOut = ++pParse->nMem;
145612 regBase = pParse->nMem + 1;
145613 pParse->nMem += nBase;
145635 regPrevKey = pParse->nMem+1;
145636 pParse->nMem += pSort->nOBSat;
145658 pSort->regReturn = ++pParse->nMem;
145789 iRet = regPrev = pParse->nMem+1;
145790 pParse->nMem += nResultCol;
146020 pParse->nMem += nPrefixReg;
146022 pDest->iSdst = pParse->nMem+1;
146023 pParse->nMem += nResultCol;
146024 }else if( pDest->iSdst+nResultCol > pParse->nMem ){
146030 pParse->nMem += nResultCol;
146079 pParse->nMem += pExtra->nExpr;
146602 int regSortOut = ++pParse->nMem;
147374 p->iLimit = iLimit = ++pParse->nMem;
147393 p->iOffset = iOffset = ++pParse->nMem;
147394 pParse->nMem++; /* Allocate an extra register for limit+offset */
147571 regCurrent = ++pParse->nMem;
148465 regPrev = pParse->nMem+1;
148466 pParse->nMem += nExpr+1;
148508 regLimitA = ++pParse->nMem;
148509 regLimitB = ++pParse->nMem;
148519 regAddrA = ++pParse->nMem;
148520 regAddrB = ++pParse->nMem;
148521 regOutA = ++pParse->nMem;
148522 regOutB = ++pParse->nMem;
151577 pAggInfo->iFirstReg = pParse->nMem + 1;
151578 pParse->nMem += pAggInfo->nColumn + pAggInfo->nFunc;
151765 if( regHit==0 ) regHit = ++pParse->nMem;
151859 if( regHit==0 && pAggInfo->nAccumulator ) regHit = ++pParse->nMem;
152734 pSubq->regReturn = ++pParse->nMem;
152783 pSubq->regReturn = ++pParse->nMem;
153002 int regGosub = ++pParse->nMem;
153192 iUseFlag = ++pParse->nMem;
153193 iAbortFlag = ++pParse->nMem;
153194 regOutputRow = ++pParse->nMem;
153196 regReset = ++pParse->nMem;
153198 iAMem = pParse->nMem + 1;
153199 pParse->nMem += pGroupBy->nExpr;
153200 iBMem = pParse->nMem + 1;
153201 pParse->nMem += pGroupBy->nExpr;
153541 regAcc = ++pParse->nMem;
154954 int reg = pParse->nMem+1;
154956 pParse->nMem += nCol+2;
155197 pProgram->nMem = sSubParse.nMem;
155271 sqlite3VdbeAddOp4(v, OP_Program, reg, ignoreJump, ++pParse->nMem,
156007 reg = ++pParse->nMem;
156008 pParse->nMem += pIdx->nColumn;
156013 reg = ++pParse->nMem;
156014 pParse->nMem += pIdx->nColumn;
156025 aRegIdx[nAllIdx] = ++pParse->nMem; /* Register storing the table record */
156042 assert( aRegIdx[nAllIdx]==pParse->nMem );
156044 regOldRowid = regNewRowid = ++pParse->nMem;
156046 regOld = pParse->nMem + 1;
156047 pParse->nMem += pTab->nCol;
156050 regNewRowid = ++pParse->nMem;
156052 regNew = pParse->nMem + 1;
156053 pParse->nMem += pTab->nCol;
156101 regRowCount = ++pParse->nMem;
156112 iPk = pParse->nMem+1;
156113 pParse->nMem += nPk;
156114 pParse->nMem += nChangeFrom;
156115 regKey = ++pParse->nMem;
156210 aRegIdx[nAllIdx] = ++pParse->nMem;
156662 regArg = pParse->nMem + 1;
156663 pParse->nMem += nArg;
156704 regRec = ++pParse->nMem;
156705 regRowid = ++pParse->nMem;
157096 int iPk = pParse->nMem+1;
157097 pParse->nMem += nPk;
157261 iIntoReg = ++pParse->nMem;
158059 iReg = ++pParse->nMem;
160519 regBase = pParse->nMem + 1;
160521 pParse->nMem += nReg;
160720 reg = ++pWalker->pParse->nMem; /* Register for column value */
160731 reg = ++pWalker->pParse->nMem; /* Register for column value */
161137 pLevel->iLeftJoin = ++pParse->nMem;
161182 int iCache = ++pParse->nMem;
161304 iReleaseReg = ++pParse->nMem;
161399 memEndValue = ++pParse->nMem;
161418 iRowidReg = ++pParse->nMem;
161518 pLevel->iLikeRepCntr = (u32)++pParse->nMem;
161555 pLevel->regBignull = regBignull = ++pParse->nMem;
161885 int regReturn = ++pParse->nMem; /* Register used with OP_Gosub */
161938 regRowset = ++pParse->nMem;
161946 regRowid = ++pParse->nMem;
162510 int r = ++pParse->nMem;
162522 pParse->nMem += nPk - 1;
165653 pLevel->regFilter = ++pParse->nMem;
165774 pLevel->regFilter = ++pParse->nMem;
171684 pRJ->regBloom = ++pParse->nMem;
171686 pRJ->regReturn = ++pParse->nMem;
171847 int r1 = pParse->nMem+1;
171852 pParse->nMem += n+1;
173207 pWin->regAccum = ++pParse->nMem;
173208 pWin->regResult = ++pParse->nMem;
173564 pMWin->regPart = pParse->nMem+1;
173565 pParse->nMem += nExpr;
173569 pMWin->regOne = ++pParse->nMem;
173573 pMWin->regStartRowid = ++pParse->nMem;
173574 pMWin->regEndRowid = ++pParse->nMem;
173598 pWin->regApp = pParse->nMem+1;
173599 pParse->nMem += 3;
173611 pWin->regApp = pParse->nMem+1;
173613 pParse->nMem += 2;
174176 regArg = pParse->nMem+1;
174177 pParse->nMem += nArg;
174270 int regString = ++pParse->nMem; /* Reg. for constant value '' */
175028 regNew = pParse->nMem+1;
175029 pParse->nMem += nInput;
175030 regRecord = ++pParse->nMem;
175031 s.regRowid = ++pParse->nMem;
175037 regStart = ++pParse->nMem;
175040 regEnd = ++pParse->nMem;
175050 regPeer = pParse->nMem+1; pParse->nMem += nPeer;
175051 s.start.reg = pParse->nMem+1; pParse->nMem += nPeer;
175052 s.current.reg = pParse->nMem+1; pParse->nMem += nPeer;
175053 s.end.reg = pParse->nMem+1; pParse->nMem += nPeer;
175076 regFlushPart = ++pParse->nMem;