Lines Matching +full:set +full:- +full:env
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
47 #include "mlx5-abi.h"
70 HCA(MELLANOX, 4113), /* MT4113 Connect-IB */
71 HCA(MELLANOX, 4114), /* Connect-IB Virtual Function */
72 HCA(MELLANOX, 4115), /* ConnectX-4 */
73 HCA(MELLANOX, 4116), /* ConnectX-4 Virtual Function */
74 HCA(MELLANOX, 4117), /* ConnectX-4LX */
75 HCA(MELLANOX, 4118), /* ConnectX-4LX Virtual Function */
76 HCA(MELLANOX, 4119), /* ConnectX-5, PCIe 3.0 */
77 HCA(MELLANOX, 4120), /* ConnectX-5 Virtual Function */
78 HCA(MELLANOX, 4121), /* ConnectX-5 Ex */
79 HCA(MELLANOX, 4122), /* ConnectX-5 Ex VF */
80 HCA(MELLANOX, 4123), /* ConnectX-6 */
81 HCA(MELLANOX, 4124), /* ConnectX-6 VF */
82 HCA(MELLANOX, 4125), /* ConnectX-6 DX */
84 HCA(MELLANOX, 4127), /* ConnectX-6 LX */
85 HCA(MELLANOX, 4129), /* ConnectX-7 */
86 HCA(MELLANOX, 4131), /* ConnectX-8 */
87 HCA(MELLANOX, 41682), /* BlueField integrated ConnectX-5 network controller */
88 HCA(MELLANOX, 41683), /* BlueField integrated ConnectX-5 network controller VF */
89 HCA(MELLANOX, 41686), /* BlueField-2 integrated ConnectX-6 Dx network controller */
90 HCA(MELLANOX, 41692), /* BlueField-3 integrated ConnectX-7 network controller */
91 HCA(MELLANOX, 41695), /* BlueField-4 integrated ConnectX-8 network controller */
145 * The function looks for the first free user-index in all the
146 * user-index tables. If all are used, returns -1, otherwise
147 * a valid user-index.
159 if (ctx->uidx_table[tind].refcnt < MLX5_UIDX_TABLE_MASK) in get_free_uidx()
164 return -1; in get_free_uidx()
166 if (!ctx->uidx_table[tind].refcnt) in get_free_uidx()
170 if (!ctx->uidx_table[tind].table[i]) in get_free_uidx()
180 int32_t ret = -1; in mlx5_store_uidx()
183 pthread_mutex_lock(&ctx->uidx_table_mutex); in mlx5_store_uidx()
190 if (!ctx->uidx_table[tind].refcnt) { in mlx5_store_uidx()
191 ctx->uidx_table[tind].table = calloc(MLX5_UIDX_TABLE_MASK + 1, in mlx5_store_uidx()
193 if (!ctx->uidx_table[tind].table) in mlx5_store_uidx()
197 ++ctx->uidx_table[tind].refcnt; in mlx5_store_uidx()
198 ctx->uidx_table[tind].table[uidx & MLX5_UIDX_TABLE_MASK] = rsc; in mlx5_store_uidx()
202 pthread_mutex_unlock(&ctx->uidx_table_mutex); in mlx5_store_uidx()
210 pthread_mutex_lock(&ctx->uidx_table_mutex); in mlx5_clear_uidx()
212 if (!--ctx->uidx_table[tind].refcnt) in mlx5_clear_uidx()
213 free(ctx->uidx_table[tind].table); in mlx5_clear_uidx()
215 ctx->uidx_table[tind].table[uidx & MLX5_UIDX_TABLE_MASK] = NULL; in mlx5_clear_uidx()
217 pthread_mutex_unlock(&ctx->uidx_table_mutex); in mlx5_clear_uidx()
225 int cur_cpu_family = -1; in mlx5_is_sandy_bridge()
226 int cur_cpu_model = -1; in mlx5_is_sandy_bridge()
241 cur_cpu_family = -1; in mlx5_is_sandy_bridge()
242 cur_cpu_model = -1; in mlx5_is_sandy_bridge()
264 …This format displays each 32-bit word in hexadecimal (using ASCII characters "0" - "9" and "a" - "…
266 …words. Words are displayed in big-endian order, which has the most significant bit first. The hex …
267 within a word are also in big-endian order.
269 …The number of 32-bit words displayed is the minimum number needed to display all bits of the bitma…
274 00000001 # just bit 0 set
275 40000000,00000000,00000000 # just bit 94 set
276 000000ff,00000000 # bits 32-39 set
277 00000000,000E3862 # 1,5,6,11-13,17-19 set
279 A mask with bits 0, 1, 2, 4, 8, 16, 32, and 64 set displays as:
303 fprintf(stderr, PFX "Warning: can not get local cpu set: failed to open %s\n", fname); in mlx5_local_cpu_set()
350 * check if app is bound to cpu set that is inside in mlx5_enable_sandy_bridge_fix()
351 * of device local cpu set. Disable stalling if true in mlx5_enable_sandy_bridge_fix()
354 /* use static cpu set - up to CPU_SETSIZE (1024) cpus/node */ in mlx5_enable_sandy_bridge_fix()
358 ret = cpuset_getaffinity(CPU_LEVEL_WHICH, CPU_WHICH_PID, -1, in mlx5_enable_sandy_bridge_fix()
360 if (ret == -1) { in mlx5_enable_sandy_bridge_fix()
362 fprintf(stderr, PFX "Warning: my cpu set is too small\n"); in mlx5_enable_sandy_bridge_fix()
364 fprintf(stderr, PFX "Warning: failed to get my cpu set\n"); in mlx5_enable_sandy_bridge_fix()
368 /* get device local cpu set */ in mlx5_enable_sandy_bridge_fix()
371 /* check if my cpu set is in dev cpu */ in mlx5_enable_sandy_bridge_fix()
391 ctx->stall_enable = (strcmp(env_value, "0")) ? 1 : 0; in mlx5_read_env()
394 ctx->stall_enable = mlx5_enable_sandy_bridge_fix(ibdev); in mlx5_read_env()
416 ctx->stall_adaptive_enable = 0; in mlx5_read_env()
417 ctx->stall_cycles = 0; in mlx5_read_env()
420 ctx->stall_adaptive_enable = 1; in mlx5_read_env()
421 ctx->stall_cycles = mlx5_stall_cq_poll_min; in mlx5_read_env()
430 char *env; in get_total_uuars() local
432 env = getenv("MLX5_TOTAL_UUARS"); in get_total_uuars()
433 if (env) in get_total_uuars()
434 size = atoi(env); in get_total_uuars()
437 return -EINVAL; in get_total_uuars()
443 return -ENOMEM; in get_total_uuars()
450 char *env; in open_debug_file() local
452 env = getenv("MLX5_DEBUG_FILE"); in open_debug_file()
453 if (!env) { in open_debug_file()
454 ctx->dbg_fp = stderr; in open_debug_file()
458 ctx->dbg_fp = fopen(env, "aw+"); in open_debug_file()
459 if (!ctx->dbg_fp) { in open_debug_file()
460 fprintf(stderr, "Failed opening debug file %s, using stderr\n", env); in open_debug_file()
461 ctx->dbg_fp = stderr; in open_debug_file()
468 if (ctx->dbg_fp && ctx->dbg_fp != stderr) in close_debug_file()
469 fclose(ctx->dbg_fp); in close_debug_file()
474 char *env; in set_debug_mask() local
476 env = getenv("MLX5_DEBUG_MASK"); in set_debug_mask()
477 if (env) in set_debug_mask()
478 mlx5_debug_mask = strtol(env, NULL, 0); in set_debug_mask()
483 char *env; in set_freeze_on_error() local
485 env = getenv("MLX5_FREEZE_ON_ERROR_CQE"); in set_freeze_on_error()
486 if (env) in set_freeze_on_error()
487 mlx5_freeze_on_error_cqe = strtol(env, NULL, 0); in set_freeze_on_error()
492 char *env; in get_always_bf() local
494 env = getenv("MLX5_POST_SEND_PREFER_BF"); in get_always_bf()
495 if (!env) in get_always_bf()
498 return strcmp(env, "0") ? 1 : 0; in get_always_bf()
503 char *env; in get_shut_up_bf() local
505 env = getenv("MLX5_SHUT_UP_BF"); in get_shut_up_bf()
506 if (!env) in get_shut_up_bf()
509 return strcmp(env, "0") ? 1 : 0; in get_shut_up_bf()
514 char *env; in get_num_low_lat_uuars() local
517 env = getenv("MLX5_NUM_LOW_LAT_UUARS"); in get_num_low_lat_uuars()
518 if (env) in get_num_low_lat_uuars()
519 num = atoi(env); in get_num_low_lat_uuars()
522 return -EINVAL; in get_num_low_lat_uuars()
524 num = max(num, tot_uuars - MLX5_MED_BFREGS_TSHOLD); in get_num_low_lat_uuars()
539 if (uuarn >= (ctx->tot_uuars - ctx->low_lat_uuars) * 2) in need_uuar_lock()
548 char *env; in single_threaded_app() local
550 env = getenv("MLX5_SINGLE_THREADED"); in single_threaded_app()
551 if (env) in single_threaded_app()
552 return strcmp(env, "1") ? 0 : 1; in single_threaded_app()
563 if (!ibv_cmd_get_context(&context->ibv_ctx, &req->ibv_req, in mlx5_cmd_get_context()
564 req_len, &resp->ibv_resp, resp_len)) in mlx5_cmd_get_context()
586 if (!ibv_cmd_get_context(&context->ibv_ctx, &req->ibv_req, in mlx5_cmd_get_context()
588 &resp->ibv_resp, resp_len)) in mlx5_cmd_get_context()
591 return ibv_cmd_get_context(&context->ibv_ctx, &req->ibv_req, in mlx5_cmd_get_context()
594 &resp->ibv_resp, resp_len); in mlx5_cmd_get_context()
605 hca_clock_page = mmap(NULL, mdev->page_size, in mlx5_map_internal_clock()
606 PROT_READ, MAP_SHARED, ibv_ctx->cmd_fd, in mlx5_map_internal_clock()
607 mdev->page_size * offset); in mlx5_map_internal_clock()
613 return -1; in mlx5_map_internal_clock()
616 context->hca_core_clock = hca_clock_page + in mlx5_map_internal_clock()
617 (context->core_clock.offset & (mdev->page_size - 1)); in mlx5_map_internal_clock()
627 attrs_out->version = 0; in mlx5dv_query_device()
628 attrs_out->flags = 0; in mlx5dv_query_device()
630 if (mctx->cqe_version == MLX5_CQE_VERSION_V1) in mlx5dv_query_device()
631 attrs_out->flags |= MLX5DV_CONTEXT_FLAGS_CQE_V1; in mlx5dv_query_device()
633 if (mctx->vendor_cap_flags & MLX5_VENDOR_CAP_FLAGS_MPW) in mlx5dv_query_device()
634 attrs_out->flags |= MLX5DV_CONTEXT_FLAGS_MPW; in mlx5dv_query_device()
636 if (attrs_out->comp_mask & MLX5DV_CONTEXT_MASK_CQE_COMPRESION) { in mlx5dv_query_device()
637 attrs_out->cqe_comp_caps = mctx->cqe_comp_caps; in mlx5dv_query_device()
641 attrs_out->comp_mask = comp_mask_out; in mlx5dv_query_device()
651 qp_out->comp_mask = 0; in mlx5dv_get_qp()
652 qp_out->dbrec = mqp->db; in mlx5dv_get_qp()
654 if (mqp->sq_buf_size) in mlx5dv_get_qp()
656 qp_out->sq.buf = (void *)((uintptr_t)mqp->sq_buf.buf); in mlx5dv_get_qp()
658 qp_out->sq.buf = (void *)((uintptr_t)mqp->buf.buf + mqp->sq.offset); in mlx5dv_get_qp()
659 qp_out->sq.wqe_cnt = mqp->sq.wqe_cnt; in mlx5dv_get_qp()
660 qp_out->sq.stride = 1 << mqp->sq.wqe_shift; in mlx5dv_get_qp()
662 qp_out->rq.buf = (void *)((uintptr_t)mqp->buf.buf + mqp->rq.offset); in mlx5dv_get_qp()
663 qp_out->rq.wqe_cnt = mqp->rq.wqe_cnt; in mlx5dv_get_qp()
664 qp_out->rq.stride = 1 << mqp->rq.wqe_shift; in mlx5dv_get_qp()
666 qp_out->bf.reg = mqp->bf->reg; in mlx5dv_get_qp()
668 if (mqp->bf->uuarn > 0) in mlx5dv_get_qp()
669 qp_out->bf.size = mqp->bf->buf_size; in mlx5dv_get_qp()
671 qp_out->bf.size = 0; in mlx5dv_get_qp()
680 struct mlx5_context *mctx = to_mctx(cq_in->context); in mlx5dv_get_cq()
682 cq_out->comp_mask = 0; in mlx5dv_get_cq()
683 cq_out->cqn = mcq->cqn; in mlx5dv_get_cq()
684 cq_out->cqe_cnt = mcq->ibv_cq.cqe + 1; in mlx5dv_get_cq()
685 cq_out->cqe_size = mcq->cqe_sz; in mlx5dv_get_cq()
686 cq_out->buf = mcq->active_buf->buf; in mlx5dv_get_cq()
687 cq_out->dbrec = mcq->dbrec; in mlx5dv_get_cq()
688 cq_out->uar = mctx->uar; in mlx5dv_get_cq()
690 mcq->flags |= MLX5_CQ_FLAGS_DV_OWNED; in mlx5dv_get_cq()
700 rwq_out->comp_mask = 0; in mlx5dv_get_rwq()
701 rwq_out->buf = mrwq->pbuff; in mlx5dv_get_rwq()
702 rwq_out->dbrec = mrwq->recv_db; in mlx5dv_get_rwq()
703 rwq_out->wqe_cnt = mrwq->rq.wqe_cnt; in mlx5dv_get_rwq()
704 rwq_out->stride = 1 << mrwq->rq.wqe_shift; in mlx5dv_get_rwq()
716 srq_out->comp_mask = 0; in mlx5dv_get_srq()
717 srq_out->buf = msrq->buf.buf; in mlx5dv_get_srq()
718 srq_out->dbrec = msrq->db; in mlx5dv_get_srq()
719 srq_out->stride = 1 << msrq->wqe_shift; in mlx5dv_get_srq()
720 srq_out->head = msrq->head; in mlx5dv_get_srq()
721 srq_out->tail = msrq->tail; in mlx5dv_get_srq()
731 ret = mlx5dv_get_qp(obj->qp.in, obj->qp.out); in mlx5dv_init_obj()
733 ret = mlx5dv_get_cq(obj->cq.in, obj->cq.out); in mlx5dv_init_obj()
735 ret = mlx5dv_get_srq(obj->srq.in, obj->srq.out); in mlx5dv_init_obj()
737 ret = mlx5dv_get_rwq(obj->rwq.in, obj->rwq.out); in mlx5dv_init_obj()
748 context->uar_size = mdev->page_size; in adjust_uar_info()
749 context->num_uars_per_page = 1; in adjust_uar_info()
753 context->uar_size = 1 << resp.log_uar_size; in adjust_uar_info()
754 context->num_uars_per_page = resp.num_uars_per_page; in adjust_uar_info()
778 mdev = to_mdev(&vdev->device); in mlx5_init_context()
780 page_size = mdev->page_size; in mlx5_init_context()
784 context->ibv_ctx.cmd_fd = cmd_fd; in mlx5_init_context()
789 if (gethostname(context->hostname, sizeof(context->hostname))) in mlx5_init_context()
790 strcpy(context->hostname, "host_unknown"); in mlx5_init_context()
794 errno = -tot_uuars; in mlx5_init_context()
800 errno = -low_lat_uuars; in mlx5_init_context()
804 if (low_lat_uuars > tot_uuars - 1) { in mlx5_init_context()
821 context->max_num_qps = resp.qp_tab_size; in mlx5_init_context()
822 context->bf_reg_size = resp.bf_reg_size; in mlx5_init_context()
823 context->tot_uuars = resp.tot_uuars; in mlx5_init_context()
824 context->low_lat_uuars = low_lat_uuars; in mlx5_init_context()
825 context->cache_line_size = resp.cache_line_size; in mlx5_init_context()
826 context->max_sq_desc_sz = resp.max_sq_desc_sz; in mlx5_init_context()
827 context->max_rq_desc_sz = resp.max_rq_desc_sz; in mlx5_init_context()
828 context->max_send_wqebb = resp.max_send_wqebb; in mlx5_init_context()
829 context->num_ports = resp.num_ports; in mlx5_init_context()
830 context->max_recv_wr = resp.max_recv_wr; in mlx5_init_context()
831 context->max_srq_recv_wr = resp.max_srq_recv_wr; in mlx5_init_context()
833 context->cqe_version = resp.cqe_version; in mlx5_init_context()
834 if (context->cqe_version) { in mlx5_init_context()
835 if (context->cqe_version == MLX5_CQE_VERSION_V1) in mlx5_init_context()
843 gross_uuars = context->tot_uuars / MLX5_NUM_NON_FP_BFREGS_PER_UAR * NUM_BFREGS_PER_UAR; in mlx5_init_context()
844 context->bfs = calloc(gross_uuars, sizeof(*context->bfs)); in mlx5_init_context()
845 if (!context->bfs) { in mlx5_init_context()
850 context->cmds_supp_uhw = resp.cmds_supp_uhw; in mlx5_init_context()
851 context->vendor_cap_flags = 0; in mlx5_init_context()
853 if (pthread_mutex_init(&context->qp_table_mutex, NULL)) in mlx5_init_context()
855 if (pthread_mutex_init(&context->srq_table_mutex, NULL)) in mlx5_init_context()
857 if (pthread_mutex_init(&context->uidx_table_mutex, NULL)) in mlx5_init_context()
860 context->qp_table[i].refcnt = 0; in mlx5_init_context()
863 context->uidx_table[i].refcnt = 0; in mlx5_init_context()
865 context->db_list = NULL; in mlx5_init_context()
867 if (pthread_mutex_init(&context->db_list_mutex, NULL)) in mlx5_init_context()
870 …num_sys_page_map = context->tot_uuars / (context->num_uars_per_page * MLX5_NUM_NON_FP_BFREGS_PER_U… in mlx5_init_context()
875 context->uar[i] = mmap(NULL, page_size, PROT_WRITE, MAP_SHARED, in mlx5_init_context()
877 if (context->uar[i] == MAP_FAILED) { in mlx5_init_context()
878 context->uar[i] = NULL; in mlx5_init_context()
884 for (j = 0; j < context->num_uars_per_page; j++) { in mlx5_init_context()
886 bfi = (i * context->num_uars_per_page + j) * NUM_BFREGS_PER_UAR + k; in mlx5_init_context()
887 context->bfs[bfi].reg = context->uar[i] + MLX5_ADAPTER_PAGE_SIZE * j + in mlx5_init_context()
888 MLX5_BF_OFFSET + k * context->bf_reg_size; in mlx5_init_context()
889 context->bfs[bfi].need_lock = need_uuar_lock(context, bfi); in mlx5_init_context()
890 if (mlx5_spinlock_init(&context->bfs[bfi].lock)) in mlx5_init_context()
892 context->bfs[bfi].offset = 0; in mlx5_init_context()
894 context->bfs[bfi].buf_size = context->bf_reg_size / 2; in mlx5_init_context()
895 context->bfs[bfi].uuarn = bfi; in mlx5_init_context()
899 context->hca_core_clock = NULL; in mlx5_init_context()
904 context->core_clock.offset = resp.hca_core_clock_offset; in mlx5_init_context()
908 if (mlx5_spinlock_init(&context->lock32)) in mlx5_init_context()
911 context->prefer_bf = get_always_bf(); in mlx5_init_context()
912 context->shut_up_bf = get_shut_up_bf(); in mlx5_init_context()
913 mlx5_read_env(&vdev->device, context); in mlx5_init_context()
915 if (mlx5_spinlock_init(&context->hugetlb_lock)) in mlx5_init_context()
917 TAILQ_INIT(&context->hugetlb_list); in mlx5_init_context()
919 context->ibv_ctx.ops = mlx5_ctx_ops; in mlx5_init_context()
940 context->cached_device_cap_flags = in mlx5_init_context()
942 context->atomic_cap = device_attr.orig_attr.atomic_cap; in mlx5_init_context()
943 context->cached_tso_caps = device_attr.tso_caps; in mlx5_init_context()
946 for (j = 0; j < min(MLX5_MAX_PORTS_NUM, context->num_ports); ++j) { in mlx5_init_context()
949 context->cached_link_layer[j] = port_attr.link_layer; in mlx5_init_context()
955 mlx5_spinlock_destroy(&context->lock32); in mlx5_init_context()
959 for (j = 0; j < context->num_uars_per_page; j++) { in mlx5_init_context()
961 bfi = (i * context->num_uars_per_page + j) * NUM_BFREGS_PER_UAR + k; in mlx5_init_context()
962 mlx5_spinlock_destroy(&context->bfs[bfi].lock); in mlx5_init_context()
968 pthread_mutex_destroy(&context->db_list_mutex); in mlx5_init_context()
971 pthread_mutex_destroy(&context->uidx_table_mutex); in mlx5_init_context()
974 pthread_mutex_destroy(&context->srq_table_mutex); in mlx5_init_context()
977 pthread_mutex_destroy(&context->qp_table_mutex); in mlx5_init_context()
980 free(context->bfs); in mlx5_init_context()
984 if (context->uar[i]) in mlx5_init_context()
985 munmap(context->uar[i], page_size); in mlx5_init_context()
995 int page_size = to_mdev(ibctx->device)->page_size; in mlx5_cleanup_context()
1002 …num_sys_page_map = context->tot_uuars / (context->num_uars_per_page * MLX5_NUM_NON_FP_BFREGS_PER_U… in mlx5_cleanup_context()
1004 for (j = 0; j < context->num_uars_per_page; j++) { in mlx5_cleanup_context()
1006 bfi = (i * context->num_uars_per_page + j) * NUM_BFREGS_PER_UAR + k; in mlx5_cleanup_context()
1007 mlx5_spinlock_destroy(&context->bfs[bfi].lock); in mlx5_cleanup_context()
1011 mlx5_spinlock_destroy(&context->hugetlb_lock); in mlx5_cleanup_context()
1012 mlx5_spinlock_destroy(&context->lock32); in mlx5_cleanup_context()
1013 pthread_mutex_destroy(&context->db_list_mutex); in mlx5_cleanup_context()
1014 pthread_mutex_destroy(&context->uidx_table_mutex); in mlx5_cleanup_context()
1015 pthread_mutex_destroy(&context->srq_table_mutex); in mlx5_cleanup_context()
1016 pthread_mutex_destroy(&context->qp_table_mutex); in mlx5_cleanup_context()
1018 free(context->bfs); in mlx5_cleanup_context()
1020 if (context->uar[i]) in mlx5_cleanup_context()
1021 munmap(context->uar[i], page_size); in mlx5_cleanup_context()
1023 if (context->hca_core_clock) in mlx5_cleanup_context()
1024 munmap(context->hca_core_clock - context->core_clock.offset, in mlx5_cleanup_context()
1077 dev->page_size = sysconf(_SC_PAGESIZE); in mlx5_driver_init()
1078 dev->driver_abi_ver = abi_version; in mlx5_driver_init()
1080 dev->verbs_dev.ops = &mlx5_dev_ops; in mlx5_driver_init()
1081 dev->verbs_dev.sz = sizeof(*dev); in mlx5_driver_init()
1082 dev->verbs_dev.size_of_context = sizeof(struct mlx5_context) - in mlx5_driver_init()
1085 return &dev->verbs_dev; in mlx5_driver_init()