89 	    !((cqe64->op_own & MLX5_CQE_OWNER_MASK) ^ !!(n & (cq->ibv_cq.cqe + 1)))) {  in get_sw_cqe()
155 		if (cqe->op_own & MLX5_INLINE_SCATTER_32)  in handle_responder_lazy()
158 		else if (cqe->op_own & MLX5_INLINE_SCATTER_64)  in handle_responder_lazy()
173 		if (cqe->op_own & MLX5_INLINE_SCATTER_32)  in handle_responder_lazy()
176 		else if (cqe->op_own & MLX5_INLINE_SCATTER_64)  in handle_responder_lazy()
198 		if (cqe->op_own & MLX5_INLINE_SCATTER_32)  in handle_responder()
201 		else if (cqe->op_own & MLX5_INLINE_SCATTER_64)  in handle_responder()
220 		if (cqe->op_own & MLX5_INLINE_SCATTER_32)  in handle_responder()
223 		else if (cqe->op_own & MLX5_INLINE_SCATTER_64)  in handle_responder()
230 	switch (cqe->op_own >> 4) {  in handle_responder()
574 				if (cqe64->op_own & MLX5_INLINE_SCATTER_32)  in mlx5_parse_cqe()
577 				else if (cqe64->op_own & MLX5_INLINE_SCATTER_64)  in mlx5_parse_cqe()
588 			if (cqe64->op_own & MLX5_INLINE_SCATTER_32)  in mlx5_parse_cqe()
591 			else if (cqe64->op_own & MLX5_INLINE_SCATTER_64)  in mlx5_parse_cqe()
1399 			owner_bit = dest64->op_own & MLX5_CQE_OWNER_MASK;  in __mlx5_cq_clean()
1401 			dest64->op_own = owner_bit |  in __mlx5_cq_clean()
1402 				(dest64->op_own & ~MLX5_CQE_OWNER_MASK);  in __mlx5_cq_clean()
1453 	if (is_hw(scqe64->op_own, i, cq->active_cqes)) {  in mlx5_cq_resize_copy_cqes()
1458 	while ((scqe64->op_own >> 4) != MLX5_CQE_RESIZE_CQ) {  in mlx5_cq_resize_copy_cqes()
1463 		dcqe64->op_own = (dcqe64->op_own & ~MLX5_CQE_OWNER_MASK) | sw_own;  in mlx5_cq_resize_copy_cqes()
1468 		if (is_hw(scqe64->op_own, i, cq->active_cqes)) {  in mlx5_cq_resize_copy_cqes()
1510 		cqe->op_own = MLX5_CQE_INVALID << 4;  in mlx5_alloc_cq_buf()