94 	uint8_t		owner_sr_opcode;  member
107 	return (!!(tcqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK) ^  in get_sw_cqe()
124 		       cqe->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK);  in mlx4_handle_error_cqe()
161 	switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {  in handle_good_req()
260 	is_send  = cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK;  in mlx4_parse_cqe()
261 	is_error = (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==  in mlx4_parse_cqe()
324 		switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {  in mlx4_parse_cqe()
505 	if (cq->cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK) {  in mlx4_cq_read_wc_opcode()
506 		switch (cq->cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {  in mlx4_cq_read_wc_opcode()
526 		switch (cq->cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {  in mlx4_cq_read_wc_opcode()
549 	int is_send  = cq->cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK;  in mlx4_cq_read_wc_flags()
553 		switch (cq->cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {  in mlx4_cq_read_wc_flags()
566 		switch (cq->cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {  in mlx4_cq_read_wc_flags()
600 	switch (cq->cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {  in mlx4_cq_read_wc_imm_data()
742 		    !(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK)) {  in __mlx4_cq_clean()
746 			if (srq && !(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK))  in __mlx4_cq_clean()
752 			owner_bit = dest->owner_sr_opcode & MLX4_CQE_OWNER_MASK;  in __mlx4_cq_clean()
754 			dest->owner_sr_opcode = owner_bit |  in __mlx4_cq_clean()
755 				(dest->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK);  in __mlx4_cq_clean()
797 	while ((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) != MLX4_CQE_OPCODE_RESIZE) {  in mlx4_cq_resize_copy_cqes()
798 		cqe->owner_sr_opcode = (cqe->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK) |  in mlx4_cq_resize_copy_cqes()