Lines Matching +full:8 +full:- +full:port
2 * Copyright (c) 2004-2009 Voltaire Inc. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
72 if (!node->chassis) in ibnd_get_chassis_type()
75 chassis_type = mad_get_field(node->info, 0, IB_NODE_VENDORID_F); in ibnd_get_chassis_type()
81 if (node->ch_type == UNRESOLVED_CT || node->ch_type > ISR4200_CT) in ibnd_get_chassis_type()
83 return ChassisTypeStr[node->ch_type]; in ibnd_get_chassis_type()
87 if (node->ch_type_str[0] == '\0') in ibnd_get_chassis_type()
89 return node->ch_type_str; in ibnd_get_chassis_type()
109 vendor_id = mad_get_field(node->info, 0,IB_NODE_VENDORID_F); in ibnd_get_chassis_slot_str()
113 if (!node->chassis) in ibnd_get_chassis_slot_str()
115 if (node->ch_slot == UNRESOLVED_CS || node->ch_slot > SRBD_CS) in ibnd_get_chassis_slot_str()
119 snprintf(str, size, "%s %d Chip %d", ChassisSlotTypeStr[node->ch_slot], in ibnd_get_chassis_slot_str()
120 node->ch_slotnum, node->ch_anafanum); in ibnd_get_chassis_slot_str()
129 for (current = fabric->chassis; current; current = current->next) in find_chassisnum()
130 if (current->chassisnum == chassisnum) in find_chassisnum()
196 mad_get_field64(node->info, 0, IB_NODE_SYSTEM_GUID_F); in xsigo_chassisguid()
207 if (!node->ports || !node->ports[1]) in xsigo_chassisguid()
210 /* Is there a peer port ? */ in xsigo_chassisguid()
211 if (!node->ports[1]->remoteport) in xsigo_chassisguid()
214 /* If peer port is Leaf 1, use its chassis GUID */ in xsigo_chassisguid()
216 mad_get_field64(node->ports[1]->remoteport->node->info, 0, in xsigo_chassisguid()
227 uint32_t vendid = mad_get_field(node->info, 0, IB_NODE_VENDORID_F); in get_chassisguid()
229 mad_get_field64(node->info, 0, IB_NODE_SYSTEM_GUID_F); in get_chassisguid()
246 for (current = fabric->chassis; current; current = current->next) in find_chassisguid()
247 if (current->chassisguid == chguid) in find_chassisguid()
264 return chassis->chassisguid; in ibnd_get_chassis_guid()
271 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_router()
278 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_spine_9096()
284 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_spine_9288()
290 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_spine_2004()
296 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_spine_2012()
302 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_spine_4700()
308 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_spine_4700x2()
314 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_spine_4200()
328 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_line_24()
335 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_line_8()
341 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_line_2024()
347 uint32_t devid = mad_get_field(n->info, 0, IB_NODE_DEVID_F); in is_line_4700()
376 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
385 /* LB slot = table[spine port] */
388 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
390 /* LB asic num = table[spine port] */
397 /* LB slot = table[spine port] */
400 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
402 /* LB asic num = table[spine port] */
409 /* LB slot = table[spine port] */
413 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9};
414 /* LB asic num = table[spine port] */
421 /* IPR FCR modules connectivity while using sFB4 port as reference */
451 /* FB slot = table[line port] */
454 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
457 /* FB asic = table[line port] */
469 /* FB slot = table[line port] */
475 /* FB asic = table[line port] */
482 /* reference { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18…
486 n->ch_slot = SPINE_CS; in get_sfb_slot()
488 n->ch_type = ISR9096_CT; in get_sfb_slot()
489 n->ch_slotnum = spine4_slot_2_slb[lineport->portnum]; in get_sfb_slot()
490 n->ch_anafanum = anafa_spine4_slot_2_slb[lineport->portnum]; in get_sfb_slot()
492 n->ch_type = ISR9288_CT; in get_sfb_slot()
493 n->ch_slotnum = spine12_slot_2_slb[lineport->portnum]; in get_sfb_slot()
494 n->ch_anafanum = anafa_spine12_slot_2_slb[lineport->portnum]; in get_sfb_slot()
496 n->ch_type = ISR2012_CT; in get_sfb_slot()
497 n->ch_slotnum = spine12_slot_2_slb[lineport->portnum]; in get_sfb_slot()
498 n->ch_anafanum = anafa_spine12_slot_2_slb[lineport->portnum]; in get_sfb_slot()
500 n->ch_type = ISR2004_CT; in get_sfb_slot()
501 n->ch_slotnum = spine4_slot_2_slb[lineport->portnum]; in get_sfb_slot()
502 n->ch_anafanum = anafa_spine4_slot_2_slb[lineport->portnum]; in get_sfb_slot()
504 n->ch_type = ISR4700_CT; in get_sfb_slot()
505 n->ch_slotnum = spine18_slot_2_slb[lineport->portnum]; in get_sfb_slot()
506 n->ch_anafanum = anafa_spine18_slot_2_slb[lineport->portnum]; in get_sfb_slot()
508 n->ch_type = ISR4700_CT; in get_sfb_slot()
509 n->ch_slotnum = spine18_slot_2_slb[lineport->portnum]; in get_sfb_slot()
510 n->ch_anafanum = anafa_spine18x2_slot_2_slb[lineport->portnum]; in get_sfb_slot()
512 n->ch_type = ISR4200_CT; in get_sfb_slot()
513 n->ch_slotnum = sfb4200_slot_2_slb[lineport->portnum]; in get_sfb_slot()
514 n->ch_anafanum = anafa_sfb4200_slot_2_slb[lineport->portnum]; in get_sfb_slot()
517 n->guid); in get_sfb_slot()
526 n->ch_found = 1; in get_router_slot()
528 n->ch_slot = SRBD_CS; in get_router_slot()
529 if (is_spine_9096(spineport->node)) { in get_router_slot()
530 n->ch_type = ISR9096_CT; in get_router_slot()
531 n->ch_slotnum = line_slot_2_sfb4[spineport->portnum]; in get_router_slot()
532 n->ch_anafanum = ipr_slot_2_sfb4_port[spineport->portnum]; in get_router_slot()
533 } else if (is_spine_9288(spineport->node)) { in get_router_slot()
534 n->ch_type = ISR9288_CT; in get_router_slot()
535 n->ch_slotnum = line_slot_2_sfb12[spineport->portnum]; in get_router_slot()
536 /* this is a smart guess based on nodeguids order on sFB-12 module */ in get_router_slot()
537 guessnum = spineport->node->guid % 4; in get_router_slot()
538 /* module 1 <--> remote anafa 3 */ in get_router_slot()
539 /* module 2 <--> remote anafa 2 */ in get_router_slot()
540 /* module 3 <--> remote anafa 1 */ in get_router_slot()
541 n->ch_anafanum = (guessnum == 3 ? 1 : (guessnum == 1 ? 3 : 2)); in get_router_slot()
542 } else if (is_spine_2012(spineport->node)) { in get_router_slot()
543 n->ch_type = ISR2012_CT; in get_router_slot()
544 n->ch_slotnum = line_slot_2_sfb12[spineport->portnum]; in get_router_slot()
545 /* this is a smart guess based on nodeguids order on sFB-12 module */ in get_router_slot()
546 guessnum = spineport->node->guid % 4; in get_router_slot()
547 // module 1 <--> remote anafa 3 in get_router_slot()
548 // module 2 <--> remote anafa 2 in get_router_slot()
549 // module 3 <--> remote anafa 1 in get_router_slot()
550 n->ch_anafanum = (guessnum == 3 ? 1 : (guessnum == 1 ? 3 : 2)); in get_router_slot()
551 } else if (is_spine_2004(spineport->node)) { in get_router_slot()
552 n->ch_type = ISR2004_CT; in get_router_slot()
553 n->ch_slotnum = line_slot_2_sfb4[spineport->portnum]; in get_router_slot()
554 n->ch_anafanum = ipr_slot_2_sfb4_port[spineport->portnum]; in get_router_slot()
557 spineport->node->guid); in get_router_slot()
564 n->ch_slot = LINE_CS; in get_slb_slot()
565 if (is_spine_9096(spineport->node)) { in get_slb_slot()
566 n->ch_type = ISR9096_CT; in get_slb_slot()
567 n->ch_slotnum = line_slot_2_sfb4[spineport->portnum]; in get_slb_slot()
568 n->ch_anafanum = anafa_line_slot_2_sfb4[spineport->portnum]; in get_slb_slot()
569 } else if (is_spine_9288(spineport->node)) { in get_slb_slot()
570 n->ch_type = ISR9288_CT; in get_slb_slot()
571 n->ch_slotnum = line_slot_2_sfb12[spineport->portnum]; in get_slb_slot()
572 n->ch_anafanum = anafa_line_slot_2_sfb12[spineport->portnum]; in get_slb_slot()
573 } else if (is_spine_2012(spineport->node)) { in get_slb_slot()
574 n->ch_type = ISR2012_CT; in get_slb_slot()
575 n->ch_slotnum = line_slot_2_sfb12[spineport->portnum]; in get_slb_slot()
576 n->ch_anafanum = anafa_line_slot_2_sfb12[spineport->portnum]; in get_slb_slot()
577 } else if (is_spine_2004(spineport->node)) { in get_slb_slot()
578 n->ch_type = ISR2004_CT; in get_slb_slot()
579 n->ch_slotnum = line_slot_2_sfb4[spineport->portnum]; in get_slb_slot()
580 n->ch_anafanum = anafa_line_slot_2_sfb4[spineport->portnum]; in get_slb_slot()
581 } else if (is_spine_4700(spineport->node)) { in get_slb_slot()
582 n->ch_type = ISR4700_CT; in get_slb_slot()
583 n->ch_slotnum = line_slot_2_sfb18[spineport->portnum]; in get_slb_slot()
584 n->ch_anafanum = anafa_line_slot_2_sfb18[spineport->portnum]; in get_slb_slot()
585 } else if (is_spine_4700x2(spineport->node)) { in get_slb_slot()
586 n->ch_type = ISR4700_CT; in get_slb_slot()
587 n->ch_slotnum = line_slot_2_sfb18x2[spineport->portnum]; in get_slb_slot()
588 n->ch_anafanum = anafa_line_slot_2_sfb18x2[spineport->portnum]; in get_slb_slot()
589 } else if (is_spine_4200(spineport->node)) { in get_slb_slot()
590 n->ch_type = ISR4200_CT; in get_slb_slot()
591 n->ch_slotnum = line_slot_2_sfb4200[spineport->portnum]; in get_slb_slot()
592 n->ch_anafanum = anafa_line_slot_2_sfb4200[spineport->portnum]; in get_slb_slot()
595 spineport->node->guid); in get_slb_slot()
607 ibnd_port_t *port; in fill_mellanox_chassis_record() local
622 - System slot name in our systems can be L[01-36] , S[01-18] in fill_mellanox_chassis_record()
623 - Node index is always 1 (we don.t have boards with multiple IS4 chips). in fill_mellanox_chassis_record()
624 - System name is taken from the currently configured host name. in fill_mellanox_chassis_record()
625 …-The board type is optional and we don.t set it currently - A leaf or spine slot can currently ho… in fill_mellanox_chassis_record()
628 memcpy(node_desc, node->nodedesc, IB_SMP_DATA_SIZE); in fill_mellanox_chassis_record()
632 if (node->ch_found) /* somehow this node has already been passed */ in fill_mellanox_chassis_record()
636 dev_id = mad_get_field(node->info, 0,IB_NODE_DEVID_F); in fill_mellanox_chassis_record()
652 …IBND_DEBUG("fill_mellanox_chassis_record: Unsupported node description format:%s - (get system_nam… in fill_mellanox_chassis_record()
661 …IBND_DEBUG("fill_mellanox_chassis_record: Unsupported node description format:%s - (get system_typ… in fill_mellanox_chassis_record()
670 …IBND_DEBUG("fill_mellanox_chassis_record: Unsupported node description format:%s - (get system_slo… in fill_mellanox_chassis_record()
678 …IBND_DEBUG("fill_mellanox_chassis_record: Unsupported node description format:%s - (get board type… in fill_mellanox_chassis_record()
686 …IBND_DEBUG("fill_mellanox_chassis_record: Unsupported node description format:%s - (get node index… in fill_mellanox_chassis_record()
691 node->ch_anafanum = (unsigned char) atoi(&node_index[1]); in fill_mellanox_chassis_record()
692 if(node->ch_anafanum != 1){ in fill_mellanox_chassis_record()
693 IBND_DEBUG("Unexpected Chip number:%d \n",node->ch_anafanum); in fill_mellanox_chassis_record()
699 node->ch_slot = LINE_CS; in fill_mellanox_chassis_record()
701 node->ch_slot = SPINE_CS; in fill_mellanox_chassis_record()
708 node->ch_found = 1; in fill_mellanox_chassis_record()
710 node->ch_slotnum = (unsigned char) atoi(&system_slot_name[1]); in fill_mellanox_chassis_record()
711 if((node->ch_slot == LINE_CS && (node->ch_slotnum > (LINES_MAX_NUM + 1))) || in fill_mellanox_chassis_record()
712 (node->ch_slot == SPINE_CS && (node->ch_slotnum > (SPINES_MAX_NUM + 1)))){ in fill_mellanox_chassis_record()
713 IBND_ERROR("fill_mellanox_chassis_record: invalid slot number:%d \n",node->ch_slotnum); in fill_mellanox_chassis_record()
714 node->ch_slotnum = 0; in fill_mellanox_chassis_record()
719 strncpy(node->ch_type_str , system_type, sizeof(node->ch_type_str)-1); in fill_mellanox_chassis_record()
721 /* Line ports 1-18 are mapped to external ports 1-18*/ in fill_mellanox_chassis_record()
722 if(node->ch_slot == LINE_CS) in fill_mellanox_chassis_record()
724 for (p = 1; p <= node->numports && p <= 18 ; p++) { in fill_mellanox_chassis_record()
725 port = node->ports[p]; in fill_mellanox_chassis_record()
726 if (!port) in fill_mellanox_chassis_record()
728 port->ext_portnum = p; in fill_mellanox_chassis_record()
737 if (node->ch_slot == LINE_CS){ in insert_mellanox_line_and_spine()
739 if (chassis->linenode[node->ch_slotnum]) in insert_mellanox_line_and_spine()
742 chassis->linenode[node->ch_slotnum] = node; in insert_mellanox_line_and_spine()
744 else if (node->ch_slot == SPINE_CS){ in insert_mellanox_line_and_spine()
746 if (chassis->spinenode[node->ch_slotnum]) in insert_mellanox_line_and_spine()
749 chassis->spinenode[node->ch_slotnum] = node; in insert_mellanox_line_and_spine()
754 node->chassis = chassis; in insert_mellanox_line_and_spine()
761 static void voltaire_portmap(ibnd_port_t * port);
770 ibnd_port_t *port; in fill_voltaire_chassis_record() local
773 if (node->ch_found) /* somehow this node has already been passed */ in fill_voltaire_chassis_record()
775 node->ch_found = 1; in fill_voltaire_chassis_record()
778 /* (which is lid of chassis router port) */ in fill_voltaire_chassis_record()
779 /* in such case node->ports is actually a requested port... */ in fill_voltaire_chassis_record()
782 for (p = 1; p <= node->numports; p++) { in fill_voltaire_chassis_record()
783 port = node->ports[p]; in fill_voltaire_chassis_record()
784 if (port && is_spine(port->remoteport->node)) in fill_voltaire_chassis_record()
785 get_router_slot(node, port->remoteport); in fill_voltaire_chassis_record()
790 for (p = 1; p <= node->numports; p++) { in fill_voltaire_chassis_record()
791 port = node->ports[p]; in fill_voltaire_chassis_record()
792 if (!port || !port->remoteport) in fill_voltaire_chassis_record()
796 * Skip ISR4700 double density fabric boards ports 19-36 in fill_voltaire_chassis_record()
799 if (is_4700x2 && (port->portnum > 18)) in fill_voltaire_chassis_record()
802 remnode = port->remoteport->node; in fill_voltaire_chassis_record()
803 if (remnode->type != IB_NODE_SWITCH) { in fill_voltaire_chassis_record()
804 if (!remnode->ch_found) in fill_voltaire_chassis_record()
805 get_router_slot(remnode, port); in fill_voltaire_chassis_record()
808 if (!node->ch_type) in fill_voltaire_chassis_record()
810 get_sfb_slot(node, port->remoteport); in fill_voltaire_chassis_record()
818 for (p = 1; p <= node->numports; p++) { in fill_voltaire_chassis_record()
819 port = node->ports[p]; in fill_voltaire_chassis_record()
820 if (!port || !port->remoteport) in fill_voltaire_chassis_record()
823 if ((is_4700_line && (port->portnum > 18)) || in fill_voltaire_chassis_record()
824 (!is_4700_line && (port->portnum > 12))) in fill_voltaire_chassis_record()
828 get_slb_slot(node, port->remoteport); in fill_voltaire_chassis_record()
833 /* for each port of this node, map external ports */ in fill_voltaire_chassis_record()
834 for (p = 1; p <= node->numports; p++) { in fill_voltaire_chassis_record()
835 port = node->ports[p]; in fill_voltaire_chassis_record()
836 if (!port) in fill_voltaire_chassis_record()
838 voltaire_portmap(port); in fill_voltaire_chassis_record()
849 retval = node->ch_slotnum; in get_line_index()
851 retval = 3 * (node->ch_slotnum - 1) + node->ch_anafanum; in get_line_index()
856 return -1; in get_line_index()
866 retval = 3 * (node->ch_slotnum - 1) + node->ch_anafanum; in get_spine_index()
868 retval = 2 * (node->ch_slotnum - 1) + node->ch_anafanum; in get_spine_index()
870 retval = node->ch_slotnum; in get_spine_index()
874 return -1; in get_spine_index()
886 if (chassis->linenode[i]) in insert_line_router()
889 chassis->linenode[i] = node; in insert_line_router()
890 node->chassis = chassis; in insert_line_router()
901 if (chassis->spinenode[i]) in insert_spine()
904 chassis->spinenode[i] = node; in insert_spine()
905 node->chassis = chassis; in insert_spine()
912 ibnd_port_t *port; in pass_on_lines_catch_spines() local
918 node = chassis->linenode[i]; in pass_on_lines_catch_spines()
925 for (p = 1; p <= node->numports; p++) { in pass_on_lines_catch_spines()
927 port = node->ports[p]; in pass_on_lines_catch_spines()
928 if (!port || !port->remoteport) in pass_on_lines_catch_spines()
931 if ((is_4700_line && (port->portnum > 18)) || in pass_on_lines_catch_spines()
932 (!is_4700_line && (port->portnum > 12))) in pass_on_lines_catch_spines()
935 remnode = port->remoteport->node; in pass_on_lines_catch_spines()
937 if (!remnode->ch_found) in pass_on_lines_catch_spines()
938 continue; /* some error - spine not initialized ? FIXME */ in pass_on_lines_catch_spines()
940 return -1; in pass_on_lines_catch_spines()
949 ibnd_port_t *port; in pass_on_spines_catch_lines() local
955 node = chassis->spinenode[i]; in pass_on_spines_catch_lines()
961 for (p = 1; p <= node->numports; p++) { in pass_on_spines_catch_lines()
962 port = node->ports[p]; in pass_on_spines_catch_lines()
963 if (!port || !port->remoteport) in pass_on_spines_catch_lines()
967 * ISR4700 double density fabric board ports 19-36 are in pass_on_spines_catch_lines()
970 if (is_4700x2 && (port->portnum > 18)) in pass_on_spines_catch_lines()
973 remnode = port->remoteport->node; in pass_on_spines_catch_lines()
975 if (!remnode->ch_found) in pass_on_spines_catch_lines()
976 continue; /* some error - line/router not initialized ? FIXME */ in pass_on_spines_catch_lines()
979 return -1; in pass_on_spines_catch_lines()
987 But nothing to do - have to be compliant with VoltaireSM/NMS
995 node = chassis->spinenode[i]; in pass_on_spines_interpolate_chguid()
1000 chassis->chassisguid = node->guid - 1; in pass_on_spines_interpolate_chguid()
1014 ibnd_port_t *port = 0; in build_chassis() local
1018 return -1; in build_chassis()
1021 for (p = 1; p <= node->numports; p++) { in build_chassis()
1023 port = node->ports[p]; in build_chassis()
1024 if (!port || !port->remoteport) in build_chassis()
1028 * ISR4700 double density fabric board ports 19-36 are in build_chassis()
1031 if (is_spine_4700x2(node) && (port->portnum > 18)) in build_chassis()
1034 remnode = port->remoteport->node; in build_chassis()
1036 if (!remnode->ch_found) in build_chassis()
1037 continue; /* some error - line or router not initialized ? FIXME */ in build_chassis()
1043 return -1; in build_chassis()
1047 return -1; in build_chassis()
1049 /* additional 2 passes needed for to overcome a problem of pure "in-chassis" */ in build_chassis()
1050 /* connectivity - extra pass to ensure that all related chips/modules */ in build_chassis()
1053 return -1; in build_chassis()
1055 return -1; in build_chassis()
1062 /* INTERNAL TO EXTERNAL PORT MAPPING */
1067 is not matching the internal ( anafa ) port
1071 Module : sLB-24
1073 ext port | 13 14 15 16 17 18 | 19 20 21 22 23 24
1074 int port | 22 23 24 18 17 16 | 22 23 24 18 17 16
1075 ext port | 1 2 3 4 5 6 | 7 8 9 10 11 12
1076 int port | 19 20 21 15 14 13 | 19 20 21 15 14 13
1077 ------------------------------------------------
1079 Module : sLB-8
1081 ext port | 13 14 15 16 17 18 | 19 20 21 22 23 24
1082 int port | 24 23 22 18 17 16 | 24 23 22 18 17 16
1083 ext port | 1 2 3 4 5 6 | 7 8 9 10 11 12
1084 int port | 21 20 19 15 14 13 | 21 20 19 15 14 13
1086 ----------->
1088 ext port | - - 5 - - 6 | - - 7 - - 8
1089 int port | 24 23 22 18 17 16 | 24 23 22 18 17 16
1090 ext port | - - 1 - - 2 | - - 3 - - 4
1091 int port | 21 20 19 15 14 13 | 21 20 19 15 14 13
1092 ------------------------------------------------
1094 Module : sLB-2024
1096 ext port | 13 14 15 16 17 18 19 20 21 22 23 24
1097 A1 int port| 13 14 15 16 17 18 19 20 21 22 23 24
1098 ext port | 1 2 3 4 5 6 7 8 9 10 11 12
1099 A2 int port| 13 14 15 16 17 18 19 20 21 22 23 24
1100 ---------------------------------------------------
1102 Module : sLB-4018
1104 int port | 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
1105 ext port | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
1106 ---------------------------------------------------
1108 Module : sFB-4700X2
1110 12X port -> 3 x 4X ports:
1112 A1 int port | 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
1113 ext port | 7 7 7 8 8 8 9 9 9 10 10 10 11 11 11 12 12 12
1114 A2 int port | 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
1115 ext port | 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 6 6 6
1122 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 11, 10, 24, 23, 22, 7, 8, 9,
1129 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 4, 4, 8, 8, 8, 3, 3, 3, 7, 7,
1136 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
1143 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18
1149 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10, 11, 11, 11, 12, 12, 12},
1155 /* reference { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, …
1158 static void voltaire_portmap(ibnd_port_t * port) in voltaire_portmap() argument
1160 int portnum = port->portnum; in voltaire_portmap()
1162 ibnd_node_t *node = port->node; in voltaire_portmap()
1166 if (!node->ch_found || (!is_line(node) && !is_4700x2_spine)) { in voltaire_portmap()
1167 port->ext_portnum = 0; in voltaire_portmap()
1175 port->ext_portnum = 0; in voltaire_portmap()
1179 if (port->node->ch_anafanum < 1 || port->node->ch_anafanum > 2) { in voltaire_portmap()
1180 port->ext_portnum = 0; in voltaire_portmap()
1184 chipnum = port->node->ch_anafanum - 1; in voltaire_portmap()
1187 port->ext_portnum = int2ext_map_slb24[chipnum][portnum]; in voltaire_portmap()
1189 port->ext_portnum = int2ext_map_slb2024[chipnum][portnum]; in voltaire_portmap()
1190 /* sLB-4018: Only one asic per LB */ in voltaire_portmap()
1192 port->ext_portnum = int2ext_map_slb4018[portnum]; in voltaire_portmap()
1193 /* sFB-4700X2 4X port */ in voltaire_portmap()
1195 port->ext_portnum = int2ext_map_sfb4700x2[chipnum][portnum]; in voltaire_portmap()
1197 port->ext_portnum = int2ext_map_slb8[chipnum][portnum]; in voltaire_portmap()
1202 if (!(chassis_scan->current_chassis = in add_chassis()
1205 return -1; in add_chassis()
1208 if (chassis_scan->first_chassis == NULL) { in add_chassis()
1209 chassis_scan->first_chassis = chassis_scan->current_chassis; in add_chassis()
1210 chassis_scan->last_chassis = chassis_scan->current_chassis; in add_chassis()
1212 chassis_scan->last_chassis->next = in add_chassis()
1213 chassis_scan->current_chassis; in add_chassis()
1214 chassis_scan->last_chassis = chassis_scan->current_chassis; in add_chassis()
1221 node->chassis = chassis; in add_node_to_chassis()
1222 node->next_chassis_node = chassis->nodes; in add_node_to_chassis()
1223 chassis->nodes = node; in add_node_to_chassis()
1236 0 on success, -1 on failure
1255 for (node = fabric->switches; node; node = node->type_next) { in group_nodes()
1257 vendor_id = mad_get_field(node->info, 0,IB_NODE_VENDORID_F); in group_nodes()
1270 for (node = fabric->switches; node; node = node->type_next) { in group_nodes()
1271 if (mad_get_field(node->info, 0, in group_nodes()
1274 if (!node->ch_found in group_nodes()
1275 || (node->chassis && node->chassis->chassisnum) in group_nodes()
1280 chassis_scan.current_chassis->chassisnum = ++chassisnum; in group_nodes()
1287 for (node = fabric->nodes; node; node = node->next) { in group_nodes()
1288 if (mad_get_field(node->info, 0, in group_nodes()
1291 if (mad_get_field64(node->info, 0, IB_NODE_SYSTEM_GUID_F)) { in group_nodes()
1294 chassis->nodecount++; in group_nodes()
1299 chassis_scan.current_chassis->chassisguid = in group_nodes()
1301 chassis_scan.current_chassis->nodecount = 1; in group_nodes()
1302 if (!fabric->chassis) in group_nodes()
1303 fabric->chassis = chassis_scan.first_chassis; in group_nodes()
1309 /* (defined as chassis->nodecount > 1) */ in group_nodes()
1310 for (node = fabric->nodes; node; node = node->next) { in group_nodes()
1312 vendor_id = mad_get_field(node->info, 0,IB_NODE_VENDORID_F); in group_nodes()
1316 if (mad_get_field64(node->info, 0, IB_NODE_SYSTEM_GUID_F)) { in group_nodes()
1318 if (chassis && chassis->nodecount > 1) { in group_nodes()
1319 if (!chassis->chassisnum) in group_nodes()
1320 chassis->chassisnum = ++chassisnum; in group_nodes()
1321 if (!node->ch_found) { in group_nodes()
1322 node->ch_found = 1; in group_nodes()
1332 fabric->chassis = chassis_scan.first_chassis; in group_nodes()
1338 ch_next = ch->next; in group_nodes()
1342 fabric->chassis = NULL; in group_nodes()
1343 return -1; in group_nodes()