Lines Matching defs:bits
31 * pulse-width modulated data bits. For IRIG-B, the carrier frequency is
85 * The first field containes the error flags in hex, where the hex bits
160 #define SUBFLD 10 /* bits per frame */
161 #define FIELD 100 /* bits per second */
268 int bits; /* demodulated bits */
677 * raw samples. The raw data bits are demodulated relative to
691 * looks for a sequence of ten bits; the first two bits must be
692 * one, the last two bits must be zero. Frame synch is asserted
708 * first two bits and the minimum over the last two bits, with
746 int bits /* decoded bits */
793 * The data bits are collected in ten-bit bauds. The first two
794 * bits are not used. The resulting patterns represent runs of
795 * 0-1 bits (0), 2-4 bits (1) and 5-7 bits (PI). The remaining
800 case 0x00: /* 0-1 bits (0) */
805 case 0xc0: /* 2-4 bits (1) */
811 case 0xf8: /* (5-7 bits (PI) */
817 default: /* 8 bits (error) */
829 * or position identifier. There are four bits per digit, ten digits per
854 * Assemble frame bits.
856 up->bits >>= 1;
858 up->bits |= 0x200;
881 temp = up->bits;
1024 * Apparently, the codec uses only the high order bits of the
1026 * wiggle the hardware bits.