23 #define	pcl720_data(base,bit)	(base+(bit>>3))  argument
24 #define pcl720_data_0_7(base)	(base+0)  argument
25 #define pcl720_data_8_15(base)	(base+1)  argument
26 #define pcl720_data_16_23(base)	(base+2)  argument
27 #define pcl720_data_24_31(base)	(base+3)  argument
28 #define pcl720_cntr(base,cntr)	(base+4+cntr)	/* cntr: 0..2 */  argument
29 #define pcl720_cntr_0(base)	(base+4)  argument
30 #define pcl720_cntr_1(base)	(base+5)  argument
31 #define pcl720_cntr_2(base)	(base+6)  argument
32 #define pcl720_ctrl(base)	(base+7)  argument
49 #define	pcl720_load(Base,Cntr,Mode,Val) \  argument
50 	({	register unsigned int	b = Base, c = Cntr, v = Val; \
63 #define	pcl720_read(Base,Cntr) \  argument
64 	({	register unsigned int	b = Base, v; \
75 #define	pcl720_input(Base) \  argument
76 	({	register unsigned int	b = Base, v; \
85 #define	pcl720_output(Base,Value) \  argument
86 	({	register unsigned int	b = Base, v = Value; \