133   const auto &RegisterClasses = RegBank.getRegClasses();  in runEnums()  local
134   if (!RegisterClasses.empty()) {  in runEnums()
137     assert(RegisterClasses.size() <= 0xffff &&  in runEnums()
144     for (const auto &RC : RegisterClasses)  in runEnums()
1037   const auto &RegisterClasses = RegBank.getRegClasses();  in runMCDesc()  local
1045   for (const auto &RC : RegisterClasses) {  in runMCDesc()
1081   for (const auto &RC : RegisterClasses) {  in runMCDesc()
1126      << RegisterClasses.size() << ", " << TargetName << "RegUnitRoots, "  in runMCDesc()
1200   const auto &RegisterClasses = RegBank.getRegClasses();  in runTargetHeader()  local
1201   if (llvm::any_of(RegisterClasses,  in runTargetHeader()
1209   if (!RegisterClasses.empty()) {  in runTargetHeader()
1210     OS << "namespace " << RegisterClasses.front().Namespace  in runTargetHeader()
1213     for (const auto &RC : RegisterClasses) {  in runTargetHeader()
1219     OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n\n";  in runTargetHeader()
1241   const auto &RegisterClasses = RegBank.getRegClasses();  in runTargetDesc()  local
1248   for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1262     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1309   if (!RegisterClasses.empty()) {  in runTargetDesc()
1320       for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1357     SmallVector<IdxList, 8> SuperRegIdxLists(RegisterClasses.size());  in runTargetDesc()
1359     BitVector MaskBV(RegisterClasses.size());  in runTargetDesc()
1361     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1389     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1403     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1435     OS << "\nnamespace " << RegisterClasses.front().Namespace  in runTargetDesc()
1438     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1464     OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n";  in runTargetDesc()
1469   for (const auto &RC : RegisterClasses)  in runTargetDesc()
1540     if (RegisterClasses.size() <= UINT8_MAX)  in runTargetDesc()
1542     else if (RegisterClasses.size() <= UINT16_MAX)  in runTargetDesc()
1546     OS << RegisterClasses.size() << "][" << SubRegIndicesSize << "] = {\n";  in runTargetDesc()
1547     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1571     if (RegisterClasses.size() <= UINT8_MAX)  in runTargetDesc()
1573     else if (RegisterClasses.size() <= UINT16_MAX)  in runTargetDesc()
1578     OS << RegisterClasses.size() << "][" << SubRegIndicesSize << "] = {\n";  in runTargetDesc()
1580     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1615   if (!RegisterClasses.empty()) {  in runTargetDesc()
1618     for (const auto &RC : RegisterClasses) {  in runTargetDesc()
1684      << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() << ",\n"  in runTargetDesc()
1692      << "MCRegisterClasses, " << RegisterClasses.size() << ",\n"  in runTargetDesc()