1247   for (unsigned PIdx = 0, PEnd = ProcModels.size(); PIdx != PEnd; ++PIdx) {  in inferFromItinClass()  local
1248     const CodeGenProcModel &PM = ProcModels[PIdx];  in inferFromItinClass()
1262       inferFromRW(Writes, Reads, FromClassIdx, PIdx);  in inferFromItinClass()
1284     unsigned PIdx = getProcModel(Rec->getValueAsDef("SchedModel")).Index;  in inferFromInstRWs()  local
1285     inferFromRW(Writes, Reads, SCIdx, PIdx); // May mutate SchedClasses.  in inferFromInstRWs()
1286     SchedClasses[SCIdx].InstRWProcIndices.insert(PIdx);  in inferFromInstRWs()
1894       unsigned PIdx = getProcModel(RWModelDef).Index;  in collectProcResources()  local
1897       collectRWResources(Writes, Reads, PIdx);  in collectProcResources()
2038   for (unsigned PIdx = 0, PEnd = ProcModels.size(); PIdx != PEnd; ++PIdx) {  in collectItinProcResources()  local
2039     const CodeGenProcModel &PM = ProcModels[PIdx];  in collectItinProcResources()
2054       collectRWResources(Writes, Reads, PIdx);  in collectItinProcResources()
2163 void CodeGenSchedModels::addWriteRes(Record *ProcWriteResDef, unsigned PIdx) {  in addWriteRes()  argument
2164   assert(PIdx && "don't add resources to an invalid Processor model");  in addWriteRes()
2166   RecVec &WRDefs = ProcModels[PIdx].WriteResDefs;  in addWriteRes()
2174     addProcResource(ProcResDef, ProcModels[PIdx], ProcWriteResDef->getLoc());  in addWriteRes()
2180                                         unsigned PIdx) {  in addReadAdvance()  argument
2190   RecVec &RADefs = ProcModels[PIdx].ReadAdvanceDefs;  in addReadAdvance()