Lines Matching refs:InstRWs
939 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses()
1070 const RecVec &RWDefs = SchedClasses[OldSCIdx].InstRWs; in createInstRWClass()
1099 SchedClasses[OldSCIdx].InstRWs.push_back(InstRWDef); in createInstRWClass()
1119 for (Record *OldRWDef : SchedClasses[OldSCIdx].InstRWs) { in createInstRWClass()
1131 SC.InstRWs.push_back(OldRWDef); in createInstRWClass()
1137 SC.InstRWs.push_back(InstRWDef); in createInstRWClass()
1233 if (!SchedClasses[Idx].InstRWs.empty()) in inferSchedClasses()
1269 for (unsigned I = 0, E = SchedClasses[SCIdx].InstRWs.size(); I != E; ++I) { in inferFromInstRWs()
1270 assert(SchedClasses[SCIdx].InstRWs.size() == E && "InstrRWs was mutated!"); in inferFromInstRWs()
1271 Record *Rec = SchedClasses[SCIdx].InstRWs[I]; in inferFromInstRWs()
1892 for (Record *RW : SC.InstRWs) { in collectProcResources()
2007 const RecVec &InstRWs = SC.InstRWs; in checkCompleteness() local
2008 auto I = find_if(InstRWs, [&ProcModel](const Record *R) { in checkCompleteness()
2011 if (I == InstRWs.end()) { in checkCompleteness()