Lines Matching refs:SubReg

266   for (const auto &SubReg : SubRegs) {  in inheritRegUnits()  local
267 CodeGenRegister *SR = SubReg.second; in inheritRegUnits()
361 for (const auto &SubReg : Map) in computeSubRegs() local
362 if (Orphans.erase(SubReg.second)) in computeSubRegs()
363 SubRegs[RegBank.getCompositeSubRegIndex(Idx, SubReg.first)] = in computeSubRegs()
364 SubReg.second; in computeSubRegs()
368 for (const auto &SubReg : SubRegs) { in computeSubRegs() local
369 if (SubReg.second == this) { in computeSubRegs()
379 SubReg.first->AllSuperRegsCovered = false; in computeSubRegs()
383 SubReg2Idx.insert(std::pair(SubReg.second, SubReg.first)).first; in computeSubRegs()
384 if (Ins->second == SubReg.first) in computeSubRegs()
391 Loc, "Sub-register can't have two names: " + SubReg.second->getName() + in computeSubRegs()
392 " available as " + SubReg.first->getName() + " and " + in computeSubRegs()
488 const CodeGenRegister *SubReg; in computeSecondarySubRegs() local
489 std::tie(SubRegIdx, SubReg) = SubRegQueue.front(); in computeSecondarySubRegs()
492 const CodeGenRegister::SuperRegList &Leads = SubReg->LeadingSuperRegs; in computeSecondarySubRegs()
506 assert(Cand->ExplicitSubRegs[0] == SubReg && "LeadingSuperRegs correct"); in computeSecondarySubRegs()
507 assert(getSubRegIndex(SubReg) == SubRegIdx && "LeadingSuperRegs correct"); in computeSecondarySubRegs()
508 for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs) { in computeSecondarySubRegs()
509 if (CodeGenSubRegIndex *SubRegIdx = getSubRegIndex(SubReg)) { in computeSecondarySubRegs()
546 for (auto SubReg : NewSubReg->SubRegs) { in computeSecondarySubRegs() local
547 CodeGenSubRegIndex *SubIdx = getSubRegIndex(SubReg.second); in computeSecondarySubRegs()
550 SubReg.second->getName() + in computeSecondarySubRegs()
552 NewIdx->addComposite(SubReg.first, SubIdx, RegBank.getHwModes()); in computeSecondarySubRegs()
565 for (auto SubReg : SubRegs) in computeSuperRegs() local
566 SubReg.second->computeSuperRegs(RegBank); in computeSuperRegs()
571 for (auto SubReg : SubRegs) { in computeSuperRegs() local
574 Id.push_back(SubReg.first->EnumValue); in computeSuperRegs()
575 Id.push_back(SubReg.second->TopoSig); in computeSuperRegs()
578 if (!SubReg.second->SuperRegs.empty() && in computeSuperRegs()
579 SubReg.second->SuperRegs.back() == this) in computeSuperRegs()
581 SubReg.second->SuperRegs.push_back(this); in computeSuperRegs()
595 for (auto SubReg : SubRegs) in addSubRegsPreOrder() local
596 OSet.insert(SubReg.second); in addSubRegsPreOrder()
2174 CodeGenRegister *SubReg = S.second; in computeRegUnitLaneMasks() local
2177 if (!SubReg->getSubRegs().empty()) in computeRegUnitLaneMasks()