Lines Matching refs:ExplicitSubRegs
183 ExplicitSubRegs.push_back(RegBank.getReg(SR)); in buildObjectGraph()
191 if (CoveredBySubRegs && !ExplicitSubRegs.empty()) in buildObjectGraph()
192 ExplicitSubRegs.front()->LeadingSuperRegs.push_back(this); in buildObjectGraph()
222 HasDisjunctSubRegs = ExplicitSubRegs.size() > 1; in computeSubRegs()
225 for (auto [SR, Idx] : zip_equal(ExplicitSubRegs, ExplicitSubRegIndices)) { in computeSubRegs()
242 for (CodeGenRegister *ESR : ExplicitSubRegs) { in computeSubRegs()
336 for (auto [Idx, SR] : enumerate(ExplicitSubRegs)) { in computeSubRegs()
343 for (unsigned j = 0, e = SR->ExplicitSubRegs.size(); j != e; ++j) { in computeSubRegs()
349 Parts.push_back(getSubRegIndex(SR->ExplicitSubRegs[j])); in computeSubRegs()
361 if (ExplicitSubRegs.empty()) { in computeSubRegs()
368 for (const CodeGenRegister *SR : ExplicitSubRegs) in computeSubRegs()
428 assert(!Cand->ExplicitSubRegs.empty() && in computeSecondarySubRegs()
430 if (Cand->ExplicitSubRegs.size() == 1) in computeSecondarySubRegs()
435 assert(Cand->ExplicitSubRegs[0] == SubReg && "LeadingSuperRegs correct"); in computeSecondarySubRegs()
437 for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs) { in computeSecondarySubRegs()
516 for (CodeGenRegister *SR : ExplicitSubRegs) { in addSubRegsPreOrder()