Lines Matching refs:SMIN
3597 { ISD::SMIN, MVT::v32i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3598 { ISD::SMIN, MVT::v64i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3663 { ISD::SMIN, MVT::v8i64, { 1, 3, 1, 1 } }, in getIntrinsicInstrCost()
3664 { ISD::SMIN, MVT::v16i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3665 { ISD::SMIN, MVT::v32i16, { 3, 7, 5, 5 } }, in getIntrinsicInstrCost()
3666 { ISD::SMIN, MVT::v64i8, { 3, 7, 5, 5 } }, in getIntrinsicInstrCost()
3667 { ISD::SMIN, MVT::v4i64, { 1, 3, 1, 1 } }, in getIntrinsicInstrCost()
3668 { ISD::SMIN, MVT::v2i64, { 1, 3, 1, 1 } }, in getIntrinsicInstrCost()
3807 { ISD::SMIN, MVT::v2i64, { 2, 7, 2, 3 } }, in getIntrinsicInstrCost()
3808 { ISD::SMIN, MVT::v4i64, { 2, 7, 2, 3 } }, in getIntrinsicInstrCost()
3809 { ISD::SMIN, MVT::v8i32, { 1, 1, 1, 2 } }, in getIntrinsicInstrCost()
3810 { ISD::SMIN, MVT::v16i16, { 1, 1, 1, 2 } }, in getIntrinsicInstrCost()
3811 { ISD::SMIN, MVT::v32i8, { 1, 1, 1, 2 } }, in getIntrinsicInstrCost()
3893 { ISD::SMIN, MVT::v4i64, { 6, 9, 6, 12 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3894 { ISD::SMIN, MVT::v2i64, { 3, 7, 2, 3 } }, in getIntrinsicInstrCost()
3895 { ISD::SMIN, MVT::v8i32, { 4, 6, 5, 6 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3896 { ISD::SMIN, MVT::v16i16, { 4, 6, 5, 6 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3897 { ISD::SMIN, MVT::v32i8, { 4, 6, 5, 6 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3980 { ISD::SMIN, MVT::v2i64, { 3, 7, 2, 3 } }, in getIntrinsicInstrCost()
3981 { ISD::SMIN, MVT::v4i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3982 { ISD::SMIN, MVT::v16i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
4044 { ISD::SMIN, MVT::v2i64, { 4, 8, 15, 15 } }, in getIntrinsicInstrCost()
4045 { ISD::SMIN, MVT::v4i32, { 2, 4, 5, 5 } }, in getIntrinsicInstrCost()
4046 { ISD::SMIN, MVT::v8i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
4047 { ISD::SMIN, MVT::v16i8, { 2, 4, 5, 5 } }, in getIntrinsicInstrCost()
4111 { ISD::SMIN, MVT::i64, { 1, 3, 2, 3 } }, in getIntrinsicInstrCost()
4157 { ISD::SMIN, MVT::i32, { 1, 2, 2, 3 } }, in getIntrinsicInstrCost()
4158 { ISD::SMIN, MVT::i16, { 1, 4, 2, 4 } }, in getIntrinsicInstrCost()
4159 { ISD::SMIN, MVT::i8, { 1, 4, 2, 4 } }, in getIntrinsicInstrCost()
4255 ISD = ISD::SMIN; in getIntrinsicInstrCost()
5442 : ISD::SMIN; in getMinMaxReductionCost()
5461 {ISD::SMIN, MVT::v2i16, 3}, // same as sse2 in getMinMaxReductionCost()
5462 {ISD::SMIN, MVT::v4i16, 5}, // same as sse2 in getMinMaxReductionCost()
5465 {ISD::SMIN, MVT::v8i16, 4}, // phminposuw+xor in getMinMaxReductionCost()
5467 {ISD::SMIN, MVT::v2i8, 3}, // pminsb in getMinMaxReductionCost()
5468 {ISD::SMIN, MVT::v4i8, 5}, // pminsb in getMinMaxReductionCost()
5469 {ISD::SMIN, MVT::v8i8, 7}, // pminsb in getMinMaxReductionCost()
5470 {ISD::SMIN, MVT::v16i8, 6}, in getMinMaxReductionCost()
5478 {ISD::SMIN, MVT::v16i16, 6}, in getMinMaxReductionCost()
5480 {ISD::SMIN, MVT::v32i8, 8}, in getMinMaxReductionCost()
5485 {ISD::SMIN, MVT::v32i16, 8}, in getMinMaxReductionCost()
5487 {ISD::SMIN, MVT::v64i8, 10}, in getMinMaxReductionCost()