Lines Matching refs:SDIV
342 if ((ISD == ISD::SDIV || ISD == ISD::SREM) && in getArithmeticInstrCost()
441 { ISD::SDIV, MVT::v16i32, { 6 } }, // pmuludq sequence in getArithmeticInstrCost()
482 { ISD::SDIV, MVT::v8i32, { 6 } }, // pmuludq sequence in getArithmeticInstrCost()
523 { ISD::SDIV, MVT::v8i32, { 14 } }, // 2*pmuludq sequence + split. in getArithmeticInstrCost()
554 { ISD::SDIV, MVT::v4i32, { 6 } }, // pmuludq sequence in getArithmeticInstrCost()
569 { ISD::SDIV, MVT::v64i8, { 14 } }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
574 { ISD::SDIV, MVT::v32i16, { 6 } }, // vpmulhw sequence in getArithmeticInstrCost()
587 { ISD::SDIV, MVT::v64i8, { 28 } }, // 4*ext+4*pmulhw sequence in getArithmeticInstrCost()
592 { ISD::SDIV, MVT::v32i16, { 12 } }, // 2*vpmulhw sequence in getArithmeticInstrCost()
597 { ISD::SDIV, MVT::v16i32, { 15 } }, // vpmuldq sequence in getArithmeticInstrCost()
610 { ISD::SDIV, MVT::v32i8, { 14 } }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
615 { ISD::SDIV, MVT::v16i16, { 6 } }, // vpmulhw sequence in getArithmeticInstrCost()
620 { ISD::SDIV, MVT::v8i32, { 15 } }, // vpmuldq sequence in getArithmeticInstrCost()
632 { ISD::SDIV, MVT::v32i8, { 30 } }, // 4*ext+4*pmulhw sequence + split. in getArithmeticInstrCost()
637 { ISD::SDIV, MVT::v16i16, { 14 } }, // 2*pmulhw sequence + split. in getArithmeticInstrCost()
642 { ISD::SDIV, MVT::v8i32, { 32 } }, // vpmuludq sequence in getArithmeticInstrCost()
654 { ISD::SDIV, MVT::v4i32, { 15 } }, // vpmuludq sequence in getArithmeticInstrCost()
665 { ISD::SDIV, MVT::v16i8, { 14 } }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
670 { ISD::SDIV, MVT::v8i16, { 6 } }, // pmulhw sequence in getArithmeticInstrCost()
675 { ISD::SDIV, MVT::v4i32, { 19 } }, // pmuludq sequence in getArithmeticInstrCost()
1488 (ISD == ISD::SDIV || ISD == ISD::SREM || ISD == ISD::UDIV || in getArithmeticInstrCost()