Lines Matching refs:CTLZ
3509 { ISD::CTLZ, MVT::v8i64, { 1, 5, 1, 1 } }, in getIntrinsicInstrCost()
3510 { ISD::CTLZ, MVT::v16i32, { 1, 5, 1, 1 } }, in getIntrinsicInstrCost()
3511 { ISD::CTLZ, MVT::v32i16, { 18, 27, 23, 27 } }, in getIntrinsicInstrCost()
3512 { ISD::CTLZ, MVT::v64i8, { 3, 16, 9, 11 } }, in getIntrinsicInstrCost()
3513 { ISD::CTLZ, MVT::v4i64, { 1, 5, 1, 1 } }, in getIntrinsicInstrCost()
3514 { ISD::CTLZ, MVT::v8i32, { 1, 5, 1, 1 } }, in getIntrinsicInstrCost()
3515 { ISD::CTLZ, MVT::v16i16, { 8, 19, 11, 13 } }, in getIntrinsicInstrCost()
3516 { ISD::CTLZ, MVT::v32i8, { 2, 11, 9, 10 } }, in getIntrinsicInstrCost()
3517 { ISD::CTLZ, MVT::v2i64, { 1, 5, 1, 1 } }, in getIntrinsicInstrCost()
3518 { ISD::CTLZ, MVT::v4i32, { 1, 5, 1, 1 } }, in getIntrinsicInstrCost()
3519 { ISD::CTLZ, MVT::v8i16, { 3, 15, 4, 6 } }, in getIntrinsicInstrCost()
3520 { ISD::CTLZ, MVT::v16i8, { 2, 10, 9, 10 } }, in getIntrinsicInstrCost()
3553 { ISD::CTLZ, MVT::v8i64, { 8, 22, 23, 23 } }, in getIntrinsicInstrCost()
3554 { ISD::CTLZ, MVT::v16i32, { 8, 23, 25, 25 } }, in getIntrinsicInstrCost()
3555 { ISD::CTLZ, MVT::v32i16, { 4, 15, 15, 16 } }, in getIntrinsicInstrCost()
3556 { ISD::CTLZ, MVT::v64i8, { 3, 12, 10, 9 } }, in getIntrinsicInstrCost()
3627 { ISD::CTLZ, MVT::v8i64, { 10, 28, 32, 32 } }, in getIntrinsicInstrCost()
3628 { ISD::CTLZ, MVT::v16i32, { 12, 30, 38, 38 } }, in getIntrinsicInstrCost()
3629 { ISD::CTLZ, MVT::v32i16, { 8, 15, 29, 29 } }, in getIntrinsicInstrCost()
3630 { ISD::CTLZ, MVT::v64i8, { 6, 11, 19, 19 } }, in getIntrinsicInstrCost()
3776 { ISD::CTLZ, MVT::v2i64, { 7, 18, 24, 25 } }, in getIntrinsicInstrCost()
3777 { ISD::CTLZ, MVT::v4i64, { 14, 18, 24, 44 } }, in getIntrinsicInstrCost()
3778 { ISD::CTLZ, MVT::v4i32, { 5, 16, 19, 20 } }, in getIntrinsicInstrCost()
3779 { ISD::CTLZ, MVT::v8i32, { 10, 16, 19, 34 } }, in getIntrinsicInstrCost()
3780 { ISD::CTLZ, MVT::v8i16, { 4, 13, 14, 15 } }, in getIntrinsicInstrCost()
3781 { ISD::CTLZ, MVT::v16i16, { 6, 14, 14, 24 } }, in getIntrinsicInstrCost()
3782 { ISD::CTLZ, MVT::v16i8, { 3, 12, 9, 10 } }, in getIntrinsicInstrCost()
3783 { ISD::CTLZ, MVT::v32i8, { 4, 12, 9, 14 } }, in getIntrinsicInstrCost()
3862 { ISD::CTLZ, MVT::v4i64, { 29, 33, 49, 58 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3863 { ISD::CTLZ, MVT::v2i64, { 14, 24, 24, 28 } }, in getIntrinsicInstrCost()
3864 { ISD::CTLZ, MVT::v8i32, { 24, 28, 39, 48 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3865 { ISD::CTLZ, MVT::v4i32, { 12, 20, 19, 23 } }, in getIntrinsicInstrCost()
3866 { ISD::CTLZ, MVT::v16i16, { 19, 22, 29, 38 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3867 { ISD::CTLZ, MVT::v8i16, { 9, 16, 14, 18 } }, in getIntrinsicInstrCost()
3868 { ISD::CTLZ, MVT::v32i8, { 14, 15, 19, 28 } }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
3869 { ISD::CTLZ, MVT::v16i8, { 7, 12, 9, 13 } }, in getIntrinsicInstrCost()
4001 { ISD::CTLZ, MVT::v2i64, { 18, 28, 28, 35 } }, in getIntrinsicInstrCost()
4002 { ISD::CTLZ, MVT::v4i32, { 15, 20, 22, 28 } }, in getIntrinsicInstrCost()
4003 { ISD::CTLZ, MVT::v8i16, { 13, 17, 16, 22 } }, in getIntrinsicInstrCost()
4004 { ISD::CTLZ, MVT::v16i8, { 11, 15, 10, 16 } }, in getIntrinsicInstrCost()
4026 { ISD::CTLZ, MVT::v2i64, { 10, 45, 36, 38 } }, in getIntrinsicInstrCost()
4027 { ISD::CTLZ, MVT::v4i32, { 10, 45, 38, 40 } }, in getIntrinsicInstrCost()
4028 { ISD::CTLZ, MVT::v8i16, { 9, 38, 32, 34 } }, in getIntrinsicInstrCost()
4029 { ISD::CTLZ, MVT::v16i8, { 8, 39, 29, 32 } }, in getIntrinsicInstrCost()
4082 { ISD::CTLZ, MVT::i64, { 1 } }, in getIntrinsicInstrCost()
4085 { ISD::CTLZ, MVT::i32, { 1 } }, in getIntrinsicInstrCost()
4086 { ISD::CTLZ, MVT::i16, { 2 } }, in getIntrinsicInstrCost()
4087 { ISD::CTLZ, MVT::i8, { 2 } }, in getIntrinsicInstrCost()
4101 { ISD::CTLZ, MVT::i64, { 4 } }, // BSR+XOR or BSR+XOR+CMOV in getIntrinsicInstrCost()
4127 { ISD::CTLZ, MVT::i32, { 4 } }, // BSR+XOR or BSR+XOR+CMOV in getIntrinsicInstrCost()
4128 { ISD::CTLZ, MVT::i16, { 4 } }, // BSR+XOR or BSR+XOR+CMOV in getIntrinsicInstrCost()
4129 { ISD::CTLZ, MVT::i8, { 4 } }, // BSR+XOR or BSR+XOR+CMOV in getIntrinsicInstrCost()
4194 ISD = ISD::CTLZ; in getIntrinsicInstrCost()
4333 (ISD == ISD::CTLZ && !ST->hasLZCNT())) && in getIntrinsicInstrCost()