Lines Matching +full:side +full:- +full:effect

1 //===-- X86SpeculativeExecutionSideEffectSuppression.cpp ------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// This file contains the X86 implementation of the speculative execution side
11 /// effect suppression mitigation.
13 /// This must be used with the -mlvi-cfi flag in order to mitigate indirect
15 //===----------------------------------------------------------------------===//
28 #define DEBUG_TYPE "x86-seses"
33     "x86-seses-enable-without-lvi-cfi",
34     cl::desc("Force enable speculative execution side effect suppression. "
35              "(Note: User must pass -mlvi-cfi in order to mitigate indirect "
40     "x86-seses-one-lfence-per-bb",
46     "x86-seses-only-lfence-non-const",
53     OmitBranchLFENCEs("x86-seses-omit-branch-lfences",
66     return "X86 Speculative Execution Side Effect Suppression";
77 // from a register that is not %rip as non-constant. Note that the use
79 // non-constant, therefore all JCC instructions will return false from this
120       // and memory timing side channels. We will treat terminators that load
124           BuildMI(MBB, MI, DebugLoc(), TII->get(X86::LFENCE));
132       // that include branches. This will close the branch prediction side
142       // together and terminates it's analysis once the first non-termintor
165         BuildMI(MBB, FirstTerminator, DebugLoc(), TII->get(X86::LFENCE));
180 INITIALIZE_PASS(X86SpeculativeExecutionSideEffectSuppression, "x86-seses",
181                 "X86 Speculative Execution Side Effect Suppression", false,