Lines Matching refs:YMM
367 SSEPackedSingle, SchedWriteFMoveLS.YMM>,
370 SSEPackedDouble, SchedWriteFMoveLS.YMM>,
373 SSEPackedSingle, SchedWriteFMoveLS.YMM>,
376 SSEPackedDouble, SchedWriteFMoveLS.YMM>,
417 let SchedRW = [SchedWriteFMoveLS.YMM.MR] in {
459 let SchedRW = [SchedWriteFMoveLS.YMM.RR] in {
1575 // YMM only
1673 // YMM only
2001 SchedWriteFCmpSizes.PS.YMM, SSEPackedSingle, loadv8f32>, TB, VEX, VVVV, VEX_L, WIG;
2004 … SchedWriteFCmpSizes.PD.YMM, SSEPackedDouble, loadv4f64>, TB, PD, VEX, VVVV, VEX_L, WIG;
2095 loadv8f32, SchedWriteFShuffle.YMM, SSEPackedSingle>,
2103 loadv4f64, SchedWriteFShuffle.YMM, SSEPackedDouble>,
2155 SchedWriteFShuffle.YMM, SSEPackedSingle>, TB, VEX, VVVV, VEX_L, WIG;
2158 SchedWriteFShuffle.YMM, SSEPackedDouble>, TB, PD, VEX, VVVV, VEX_L, WIG;
2161 SchedWriteFShuffle.YMM, SSEPackedSingle>, TB, VEX, VVVV, VEX_L, WIG;
2164 SchedWriteFShuffle.YMM, SSEPackedDouble>, TB, PD, VEX, VVVV, VEX_L, WIG;
2300 OpVT256, VR256, load, i256mem, sched.YMM,
2327 !strconcat(OpcodeStr, "ps"), f256mem, sched.YMM,
2331 !strconcat(OpcodeStr, "pd"), f256mem, sched.YMM,
2659 SSEPackedSingle, sched.PS.YMM, 0>, TB, VEX, VVVV, VEX_L, WIG;
2662 SSEPackedDouble, sched.PD.YMM, 0>, TB, PD, VEX, VVVV, VEX_L, WIG;
2975 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
2980 VEX, VEX_L, Sched<[sched.YMM.Folded]>, WIG;
3011 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
3016 VEX, VEX_L, Sched<[sched.YMM.Folded]>, WIG;
3133 let SchedRW = [SchedWriteFMoveLSNT.YMM.MR] in {
3158 Sched<[SchedWriteVecMoveLSNT.YMM.MR]>;
3303 Sched<[SchedWriteVecMoveLS.YMM.RR]>, VEX, VEX_L, WIG;
3306 Sched<[SchedWriteVecMoveLS.YMM.RR]>, VEX, VEX_L, WIG;
3317 Sched<[SchedWriteVecMoveLS.YMM.RR]>,
3325 Sched<[SchedWriteVecMoveLS.YMM.RR]>,
3337 Sched<[SchedWriteVecMoveLS.YMM.RM]>,
3346 Sched<[SchedWriteVecMoveLS.YMM.RM]>,
3359 Sched<[SchedWriteVecMoveLS.YMM.MR]>, VEX, VEX_L, WIG;
3366 Sched<[SchedWriteVecMoveLS.YMM.MR]>, TB, XS, VEX, VEX_L, WIG;
3557 VR256, load, i256mem, SchedWriteVecIMul.YMM,
3569 load, i256mem, SchedWritePSADBW.YMM, 0>,
3623 OpNode, OpNode2, VR256, sched.YMM, schedImm.YMM,
3650 VR256, v32i8, sched.YMM, 0>,
3741 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
3749 Sched<[sched.YMM.Folded]>, WIG;
3852 i256mem, SchedWriteShuffle.YMM, load, 0>,
3855 i256mem, SchedWriteShuffle.YMM, load, 0>,
3859 i256mem, SchedWriteShuffle.YMM, load, 0>,
3862 i256mem, SchedWriteShuffle.YMM, load, 0>,
3937 i256mem, SchedWriteShuffle.YMM, load, 0>,
3940 i256mem, SchedWriteShuffle.YMM, load, 0>,
3943 i256mem, SchedWriteShuffle.YMM, load, 0>,
3946 i256mem, SchedWriteShuffle.YMM, load, 0>,
3952 i256mem, SchedWriteShuffle.YMM, load, 0>,
3955 i256mem, SchedWriteShuffle.YMM, load, 0>,
3958 i256mem, SchedWriteShuffle.YMM, load, 0>,
3961 i256mem, SchedWriteShuffle.YMM, load, 0>,
4440 SchedWriteFShuffle.YMM>, VEX, VEX_L, WIG;
4443 SchedWriteFShuffle.YMM>, VEX, VEX_L, WIG;
4502 Sched<[sched.YMM]>;
4507 Sched<[sched.YMM.Folded]>;
4542 Sched<[SchedWriteVecMoveLS.YMM.RM]>, VEX, VEX_L, WIG;
4581 SchedWriteFAddSizes.PS.YMM, loadv8f32, 0>,
4589 SchedWriteFAddSizes.PD.YMM, loadv4f64, 0>,
4714 Sched<[sched.YMM]>;
4721 Sched<[sched.YMM.Folded]>;
4868 SchedWriteVarShuffle.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4871 SchedWriteVecIMul.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4875 SchedWriteVecIMul.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4882 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4885 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4888 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4891 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4893 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4895 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4897 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4900 SchedWritePHAdd.YMM>, VEX, VVVV, VEX_L, WIG;
4903 SchedWritePHAdd.YMM>, VEX, VVVV, VEX_L, WIG;
4975 SchedWriteShuffle.YMM, 0>, VEX, VVVV, VEX_L, WIG;
5033 VR256, VR128, SchedWriteVecExtend.YMM>,
5638 loadv8f32, X86any_VRndScale, SchedWriteFRnd.YMM>,
5647 loadv4f64, X86any_VRndScale, SchedWriteFRnd.YMM>,
5727 Sched<[SchedWriteVecTest.YMM]>, VEX, VEX_L, WIG;
5731 Sched<[SchedWriteVecTest.YMM.Folded, SchedWriteVecTest.YMM.ReadAfterFold]>,
5783 SchedWriteFTest.YMM>, VEX_L;
5789 SchedWriteFTest.YMM>, VEX_L;
5907 load, i256mem, SchedWriteVecALU.YMM, 0>,
5910 load, i256mem, SchedWriteVecALU.YMM, 0>,
5913 load, i256mem, SchedWriteVecALU.YMM, 0>,
5916 load, i256mem, SchedWriteVecALU.YMM, 0>,
5919 load, i256mem, SchedWriteVecIMul.YMM, 0>,
5924 load, i256mem, SchedWriteVecALU.YMM, 0>,
5927 load, i256mem, SchedWriteVecALU.YMM, 0>,
5930 load, i256mem, SchedWriteVecALU.YMM, 0>,
5933 load, i256mem, SchedWriteVecALU.YMM, 0>,
5969 load, i256mem, SchedWritePMULLD.YMM, 0>,
5973 load, i256mem, SchedWriteVecALU.YMM, 0>,
6137 SchedWriteDPPS.YMM>, VEX, VVVV, VEX_L, WIG;
6145 SchedWriteMPSAD.YMM>, VEX, VVVV, VEX_L, WIG;
6207 SchedWriteFBlend.YMM, BlendCommuteImm8>,
6215 SchedWriteFBlend.YMM, BlendCommuteImm4>,
6226 SchedWriteBlend.YMM, BlendCommuteImm8>,
6349 SchedWriteFVarBlend.YMM>, VEX_L;
6357 SchedWriteFVarBlend.YMM>, VEX_L;
6367 SchedWriteVarBlend.YMM>, VEX_L;
6511 Sched<[SchedWriteVecMoveLSNT.YMM.RM]>, VEX, VEX_L, WIG;
6602 load, i256mem, SchedWriteVecALU.YMM, 0>,
7222 // with YMM register containing zero.
7379 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
7386 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM.Folded,
7387 SchedWriteVecIMul.YMM.ReadAfterFold,
7388 SchedWriteVecIMul.YMM.ReadAfterFold]>;
7453 v8f32, v8i32, SchedWriteFShuffle.YMM,
7454 SchedWriteFVarShuffle.YMM>, VEX_L;
7461 v4f64, v4i64, SchedWriteFShuffle.YMM,
7462 SchedWriteFVarShuffle.YMM>, VEX_L;
7466 // VZERO - Zero YMM registers
7473 // Zero All YMM registers
7478 // Zero Upper bits of YMM registers
7579 SchedWriteBlend.YMM, VR256, i256mem,
8033 VEX, VVVV, VEX_L, Sched<[SchedWriteVarVecShift.YMM]>;
8040 VEX, VVVV, VEX_L, Sched<[SchedWriteVarVecShift.YMM.Folded,
8041 SchedWriteVarVecShift.YMM.ReadAfterFold]>;
8155 load, i256mem, SchedWriteVecIMul.YMM>,
8169 i256mem, SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L;
8204 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8211 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8243 i256mem, X86vpdpbssd, SchedWriteVecIMul.YMM,
8249 i256mem, X86vpdpbuud, SchedWriteVecIMul.YMM,
8255 i256mem, X86vpdpbssds, SchedWriteVecIMul.YMM,
8261 i256mem, X86vpdpbuuds, SchedWriteVecIMul.YMM,
8267 i256mem, X86vpdpbsud, SchedWriteVecIMul.YMM,
8273 i256mem, X86vpdpbsuds, SchedWriteVecIMul.YMM,
8454 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8462 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;