Lines Matching refs:VR128
121 def FsFLD0F128 : I<0, Pseudo, (outs VR128:$dst), (ins), "",
122 [(set VR128:$dst, fp128imm0)]>, Requires<[HasSSE1, NoAVX512]>;
136 def V_SET0 : I<0, Pseudo, (outs VR128:$dst), (ins), "",
137 [(set VR128:$dst, (v4f32 immAllZerosV))]>;
173 def V_SETALLONES : I<0, Pseudo, (outs VR128:$dst), (ins), "",
174 [(set VR128:$dst, (v4i32 immAllOnesV))]>;
197 def rr : SI<0x10, MRMSrcReg, (outs VR128:$dst),
198 (ins VR128:$src1, VR128:$src2),
200 [(set VR128:$dst, (vt (OpNode VR128:$src1, VR128:$src2)))], d>,
205 def rr_REV : SI<0x11, MRMDestReg, (outs VR128:$dst),
206 (ins VR128:$src1, VR128:$src2),
238 VR128:$dst, VR128:$src1, VR128:$src2), 0>;
241 VR128:$dst, VR128:$src2), 0>;
248 def V#NAME#rm : SI<0x10, MRMSrcMem, (outs VR128:$dst), (ins x86memop:$src),
250 [(set VR128:$dst, (vt (vzloadfrag addr:$src)))], d>,
252 def NAME#rm : SI<0x10, MRMSrcMem, (outs VR128:$dst), (ins x86memop:$src),
254 [(set VR128:$dst, (vt (vzloadfrag addr:$src)))], d>,
298 // Move scalar to XMM zero-extended, zeroing a VR128 then do a
300 def : Pat<(v4f32 (X86vzmovl (v4f32 VR128:$src))),
301 (VMOVSSrr (v4f32 (V_SET0)), VR128:$src)>;
302 def : Pat<(v4i32 (X86vzmovl (v4i32 VR128:$src))),
303 (VMOVSSrr (v4i32 (V_SET0)), VR128:$src)>;
317 // Move scalar to XMM zero-extended, zeroing a VR128 then do a
319 def : Pat<(v4f32 (X86vzmovl (v4f32 VR128:$src))),
320 (MOVSSrr (v4f32 (V_SET0)), VR128:$src)>;
321 def : Pat<(v4i32 (X86vzmovl (v4i32 VR128:$src))),
322 (MOVSSrr (v4i32 (V_SET0)), VR128:$src)>;
353 defm VMOVAPS : sse12_mov_packed<0x28, VR128, f128mem, alignedloadv4f32, "movaps",
356 defm VMOVAPD : sse12_mov_packed<0x28, VR128, f128mem, alignedloadv2f64, "movapd",
359 defm VMOVUPS : sse12_mov_packed<0x10, VR128, f128mem, loadv4f32, "movups",
362 defm VMOVUPD : sse12_mov_packed<0x10, VR128, f128mem, loadv2f64, "movupd",
381 defm MOVAPS : sse12_mov_packed<0x28, VR128, f128mem, alignedloadv4f32, "movaps",
384 defm MOVUPS : sse12_mov_packed<0x10, VR128, f128mem, loadv4f32, "movups",
389 defm MOVAPD : sse12_mov_packed<0x28, VR128, f128mem, alignedloadv2f64, "movapd",
392 defm MOVUPD : sse12_mov_packed<0x10, VR128, f128mem, loadv2f64, "movupd",
399 def VMOVAPSmr : VPSI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
401 [(alignedstore (v4f32 VR128:$src), addr:$dst)]>,
403 def VMOVAPDmr : VPDI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
405 [(alignedstore (v2f64 VR128:$src), addr:$dst)]>,
407 def VMOVUPSmr : VPSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
409 [(store (v4f32 VR128:$src), addr:$dst)]>,
411 def VMOVUPDmr : VPDI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
413 [(store (v2f64 VR128:$src), addr:$dst)]>,
441 def VMOVAPSrr_REV : VPSI<0x29, MRMDestReg, (outs VR128:$dst),
442 (ins VR128:$src),
445 def VMOVAPDrr_REV : VPDI<0x29, MRMDestReg, (outs VR128:$dst),
446 (ins VR128:$src),
449 def VMOVUPSrr_REV : VPSI<0x11, MRMDestReg, (outs VR128:$dst),
450 (ins VR128:$src),
453 def VMOVUPDrr_REV : VPDI<0x11, MRMDestReg, (outs VR128:$dst),
454 (ins VR128:$src),
481 (VMOVAPSrr_REV VR128:$dst, VR128:$src), 0>;
483 (VMOVAPDrr_REV VR128:$dst, VR128:$src), 0>;
485 (VMOVUPSrr_REV VR128:$dst, VR128:$src), 0>;
487 (VMOVUPDrr_REV VR128:$dst, VR128:$src), 0>;
498 def MOVAPSmr : PSI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
500 [(alignedstore (v4f32 VR128:$src), addr:$dst)]>;
501 def MOVAPDmr : PDI<0x29, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
503 [(alignedstore (v2f64 VR128:$src), addr:$dst)]>;
504 def MOVUPSmr : PSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
506 [(store (v4f32 VR128:$src), addr:$dst)]>;
507 def MOVUPDmr : PDI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
509 [(store (v2f64 VR128:$src), addr:$dst)]>;
515 def MOVAPSrr_REV : PSI<0x29, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
517 def MOVAPDrr_REV : PDI<0x29, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
519 def MOVUPSrr_REV : PSI<0x11, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
521 def MOVUPDrr_REV : PDI<0x11, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
527 (MOVAPSrr_REV VR128:$dst, VR128:$src), 0>;
529 (MOVAPDrr_REV VR128:$dst, VR128:$src), 0>;
531 (MOVUPSrr_REV VR128:$dst, VR128:$src), 0>;
533 (MOVUPDrr_REV VR128:$dst, VR128:$src), 0>;
581 def : Pat<(alignedstore (v8f16 VR128:$src), addr:$dst),
582 (VMOVAPSmr addr:$dst, VR128:$src)>;
583 def : Pat<(alignedstore (v8bf16 VR128:$src), addr:$dst),
584 (VMOVAPSmr addr:$dst, VR128:$src)>;
585 def : Pat<(store (v8f16 VR128:$src), addr:$dst),
586 (VMOVUPSmr addr:$dst, VR128:$src)>;
587 def : Pat<(store (v8bf16 VR128:$src), addr:$dst),
588 (VMOVUPSmr addr:$dst, VR128:$src)>;
629 def : Pat<(alignedstore (v2i64 VR128:$src), addr:$dst),
630 (MOVAPSmr addr:$dst, VR128:$src)>;
631 def : Pat<(alignedstore (v4i32 VR128:$src), addr:$dst),
632 (MOVAPSmr addr:$dst, VR128:$src)>;
633 def : Pat<(alignedstore (v8i16 VR128:$src), addr:$dst),
634 (MOVAPSmr addr:$dst, VR128:$src)>;
635 def : Pat<(alignedstore (v16i8 VR128:$src), addr:$dst),
636 (MOVAPSmr addr:$dst, VR128:$src)>;
637 def : Pat<(store (v2i64 VR128:$src), addr:$dst),
638 (MOVUPSmr addr:$dst, VR128:$src)>;
639 def : Pat<(store (v4i32 VR128:$src), addr:$dst),
640 (MOVUPSmr addr:$dst, VR128:$src)>;
641 def : Pat<(store (v8i16 VR128:$src), addr:$dst),
642 (MOVUPSmr addr:$dst, VR128:$src)>;
643 def : Pat<(store (v16i8 VR128:$src), addr:$dst),
644 (MOVUPSmr addr:$dst, VR128:$src)>;
652 def : Pat<(alignedstore (v8f16 VR128:$src), addr:$dst),
653 (MOVAPSmr addr:$dst, VR128:$src)>;
654 def : Pat<(store (v8f16 VR128:$src), addr:$dst),
655 (MOVUPSmr addr:$dst, VR128:$src)>;
667 (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2),
673 (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2),
675 [(set VR128:$dst, (v2f64 (pdnode VR128:$src1,
698 def VMOVLPSmr : VPSI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
702 def VMOVLPDmr : VPDI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
704 [(store (f64 (extractelt (v2f64 VR128:$src),
709 def MOVLPSmr : PSI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
712 def MOVLPDmr : PDI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
714 [(store (f64 (extractelt (v2f64 VR128:$src),
722 def : Pat<(X86Shufp (v4f32 (simple_load addr:$src2)), VR128:$src1,
724 (MOVLPSrm VR128:$src1, addr:$src2)>;
725 def : Pat<(X86Shufp (v4f32 (X86vzload64 addr:$src2)), VR128:$src1, (i8 -28)),
726 (MOVLPSrm VR128:$src1, addr:$src2)>;
730 def : Pat<(X86vextractstore64 (v4f32 VR128:$src), addr:$dst),
731 (MOVLPSmr addr:$dst, VR128:$src)>;
745 def VMOVHPSmr : VPSI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
748 def VMOVHPDmr : VPDI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
751 (v2f64 (X86Unpckh VR128:$src, VR128:$src)),
755 def MOVHPSmr : PSI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
758 def MOVHPDmr : PDI<0x17, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
761 (v2f64 (X86Unpckh VR128:$src, VR128:$src)),
767 def : Pat<(v2f64 (X86Unpckl VR128:$src1, (X86vzload64 addr:$src2))),
768 (VMOVHPDrm VR128:$src1, addr:$src2)>;
771 (v2f64 (X86VPermilpi VR128:$src, (i8 1))),
773 (VMOVHPDmr addr:$dst, VR128:$src)>;
776 def : Pat<(v2f64 (X86Movsd VR128:$src1, (X86vzload64 addr:$src2))),
777 (VMOVLPDrm VR128:$src1, addr:$src2)>;
784 def : Pat<(X86Movlhps VR128:$src1, (v4f32 (simple_load addr:$src2))),
785 (MOVHPSrm VR128:$src1, addr:$src2)>;
786 def : Pat<(X86Movlhps VR128:$src1, (v4f32 (X86vzload64 addr:$src2))),
787 (MOVHPSrm VR128:$src1, addr:$src2)>;
789 def : Pat<(X86vextractstore64 (v4f32 (X86Movhlps VR128:$src, VR128:$src)),
791 (MOVHPSmr addr:$dst, VR128:$src)>;
796 def : Pat<(v2f64 (X86Unpckl VR128:$src1, (X86vzload64 addr:$src2))),
797 (MOVHPDrm VR128:$src1, addr:$src2)>;
800 (v2f64 (X86Shufp VR128:$src, VR128:$src, (i8 1))),
802 (MOVHPDmr addr:$dst, VR128:$src)>;
805 def : Pat<(v2f64 (X86Movsd VR128:$src1, (X86vzload64 addr:$src2))),
806 (MOVLPDrm VR128:$src1, addr:$src2)>;
812 def : Pat<(X86Movsd VR128:$src1, (v2f64 (simple_load addr:$src2))),
813 (MOVLPDrm VR128:$src1, addr:$src2)>;
821 def VMOVLHPSrr : VPSI<0x16, MRMSrcReg, (outs VR128:$dst),
822 (ins VR128:$src1, VR128:$src2),
824 [(set VR128:$dst,
825 (v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))]>,
828 def VMOVHLPSrr : VPSI<0x12, MRMSrcReg, (outs VR128:$dst),
829 (ins VR128:$src1, VR128:$src2),
831 [(set VR128:$dst,
832 (v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))]>,
836 def MOVLHPSrr : PSI<0x16, MRMSrcReg, (outs VR128:$dst),
837 (ins VR128:$src1, VR128:$src2),
839 [(set VR128:$dst,
840 (v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))]>,
843 def MOVHLPSrr : PSI<0x12, MRMSrcReg, (outs VR128:$dst),
844 (ins VR128:$src1, VR128:$src2),
846 [(set VR128:$dst,
847 (v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))]>,
1075 defm VCVTSD2SI : sse12_cvt_sint<0x2D, VR128, GR32, i32, v2f64,
1078 defm VCVTSD2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, i64, v2f64,
1082 defm CVTSD2SI : sse12_cvt_sint<0x2D, VR128, GR32, i32, v2f64, X86cvts2si,
1085 defm CVTSD2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, i64, v2f64, X86cvts2si,
1091 defm VCVTSI2SS : sse12_cvt_sint_3addr<0x2A, GR32, VR128,
1094 defm VCVTSI642SS : sse12_cvt_sint_3addr<0x2A, GR64, VR128,
1097 defm VCVTSI2SD : sse12_cvt_sint_3addr<0x2A, GR32, VR128,
1100 defm VCVTSI642SD : sse12_cvt_sint_3addr<0x2A, GR64, VR128,
1105 defm CVTSI2SS : sse12_cvt_sint_3addr<0x2A, GR32, VR128,
1108 defm CVTSI642SS : sse12_cvt_sint_3addr<0x2A, GR64, VR128,
1111 defm CVTSI2SD : sse12_cvt_sint_3addr<0x2A, GR32, VR128,
1114 defm CVTSI642SD : sse12_cvt_sint_3addr<0x2A, GR64, VR128,
1120 (VCVTSI2SSrr_Int VR128:$dst, VR128:$src1, GR32:$src2), 0, "att">;
1122 (VCVTSI642SSrr_Int VR128:$dst, VR128:$src1, GR64:$src2), 0, "att">;
1124 (VCVTSI2SDrr_Int VR128:$dst, VR128:$src1, GR32:$src2), 0, "att">;
1126 (VCVTSI642SDrr_Int VR128:$dst, VR128:$src1, GR64:$src2), 0, "att">;
1129 (VCVTSI2SSrm_Int VR128:$dst, VR128:$src1, i32mem:$src), 0, "att">;
1131 (VCVTSI2SDrm_Int VR128:$dst, VR128:$src1, i32mem:$src), 0, "att">;
1134 (CVTSI2SSrr_Int VR128:$dst, GR32:$src), 0, "att">;
1136 (CVTSI642SSrr_Int VR128:$dst, GR64:$src), 0, "att">;
1138 (CVTSI2SDrr_Int VR128:$dst, GR32:$src), 0, "att">;
1140 (CVTSI642SDrr_Int VR128:$dst, GR64:$src), 0, "att">;
1143 (CVTSI2SSrm_Int VR128:$dst, i32mem:$src), 0, "att">;
1145 (CVTSI2SDrm_Int VR128:$dst, i32mem:$src), 0, "att">;
1151 defm VCVTTSS2SI : sse12_cvt_sint<0x2C, VR128, GR32, i32, v4f32, X86cvtts2Int,
1154 defm VCVTTSS2SI64 : sse12_cvt_sint<0x2C, VR128, GR64, i64, v4f32,
1158 defm VCVTTSD2SI : sse12_cvt_sint<0x2C, VR128, GR32, i32, v2f64, X86cvtts2Int,
1161 defm VCVTTSD2SI64 : sse12_cvt_sint<0x2C, VR128, GR64, i64, v2f64,
1167 defm CVTTSS2SI : sse12_cvt_sint<0x2C, VR128, GR32, i32, v4f32, X86cvtts2Int,
1170 defm CVTTSS2SI64 : sse12_cvt_sint<0x2C, VR128, GR64, i64, v4f32,
1174 defm CVTTSD2SI : sse12_cvt_sint<0x2C, VR128, GR32, i32, v2f64, X86cvtts2Int,
1177 defm CVTTSD2SI64 : sse12_cvt_sint<0x2C, VR128, GR64, i64, v2f64,
1184 (VCVTTSS2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1188 (VCVTTSD2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1192 (VCVTTSS2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1196 (VCVTTSD2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1201 (CVTTSS2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1205 (CVTTSD2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1209 (CVTTSS2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1213 (CVTTSD2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1218 defm VCVTSS2SI : sse12_cvt_sint<0x2D, VR128, GR32, i32, v4f32, X86cvts2si,
1221 defm VCVTSS2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, i64, v4f32, X86cvts2si,
1226 defm CVTSS2SI : sse12_cvt_sint<0x2D, VR128, GR32, i32, v4f32, X86cvts2si,
1229 defm CVTSS2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, i64, v4f32, X86cvts2si,
1233 defm VCVTDQ2PS : sse12_cvt_p<0x5B, VR128, i128mem, v4f32, v4i32, load,
1242 defm CVTDQ2PS : sse12_cvt_p<0x5B, VR128, i128mem, v4f32, v4i32, memop,
1250 (VCVTSS2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1254 (VCVTSD2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1258 (VCVTSS2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1262 (VCVTSD2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1268 (CVTSS2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1272 (CVTSD2SIrr_Int GR32:$dst, VR128:$src), 0, "att">;
1276 (CVTSS2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1280 (CVTSD2SI64rr_Int GR64:$dst, VR128:$src), 0, "att">;
1320 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1322 [(set VR128:$dst,
1323 (v4f32 (X86frounds VR128:$src1, (v2f64 VR128:$src2))))]>,
1327 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
1329 [(set VR128:$dst,
1330 (v4f32 (X86frounds VR128:$src1, (sse_load_f64 addr:$src2))))]>,
1335 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1337 [(set VR128:$dst,
1338 (v4f32 (X86frounds VR128:$src1, (v2f64 VR128:$src2))))]>,
1341 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
1343 [(set VR128:$dst,
1344 (v4f32 (X86frounds VR128:$src1, (sse_load_f64 addr:$src2))))]>,
1387 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1393 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2),
1399 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1405 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2),
1417 (v4f32 VR128:$dst),
1419 (f32 (any_fpround (f64 (extractelt VR128:$src, (iPTR 0))))))))),
1420 (VCVTSD2SSrr_Int VR128:$dst, VR128:$src)>;
1423 (v2f64 VR128:$dst),
1425 (f64 (any_fpextend (f32 (extractelt VR128:$src, (iPTR 0))))))))),
1426 (VCVTSS2SDrr_Int VR128:$dst, VR128:$src)>;
1429 (v4f32 VR128:$dst),
1431 (VCVTSI642SSrr_Int VR128:$dst, GR64:$src)>;
1434 (v4f32 VR128:$dst),
1436 (VCVTSI642SSrm_Int VR128:$dst, addr:$src)>;
1439 (v4f32 VR128:$dst),
1441 (VCVTSI2SSrr_Int VR128:$dst, GR32:$src)>;
1444 (v4f32 VR128:$dst),
1446 (VCVTSI2SSrm_Int VR128:$dst, addr:$src)>;
1449 (v2f64 VR128:$dst),
1451 (VCVTSI642SDrr_Int VR128:$dst, GR64:$src)>;
1454 (v2f64 VR128:$dst),
1456 (VCVTSI642SDrm_Int VR128:$dst, addr:$src)>;
1459 (v2f64 VR128:$dst),
1461 (VCVTSI2SDrr_Int VR128:$dst, GR32:$src)>;
1464 (v2f64 VR128:$dst),
1466 (VCVTSI2SDrm_Int VR128:$dst, addr:$src)>;
1471 (v4f32 VR128:$dst),
1473 (f32 (any_fpround (f64 (extractelt VR128:$src, (iPTR 0))))))))),
1474 (CVTSD2SSrr_Int VR128:$dst, VR128:$src)>;
1477 (v2f64 VR128:$dst),
1479 (f64 (any_fpextend (f32 (extractelt VR128:$src, (iPTR 0))))))))),
1480 (CVTSS2SDrr_Int VR128:$dst, VR128:$src)>;
1483 (v2f64 VR128:$dst),
1485 (CVTSI642SDrr_Int VR128:$dst, GR64:$src)>;
1488 (v2f64 VR128:$dst),
1490 (CVTSI642SDrm_Int VR128:$dst, addr:$src)>;
1493 (v2f64 VR128:$dst),
1495 (CVTSI2SDrr_Int VR128:$dst, GR32:$src)>;
1498 (v2f64 VR128:$dst),
1500 (CVTSI2SDrm_Int VR128:$dst, addr:$src)>;
1505 (v4f32 VR128:$dst),
1507 (CVTSI642SSrr_Int VR128:$dst, GR64:$src)>;
1510 (v4f32 VR128:$dst),
1512 (CVTSI642SSrm_Int VR128:$dst, addr:$src)>;
1515 (v4f32 VR128:$dst),
1517 (CVTSI2SSrr_Int VR128:$dst, GR32:$src)>;
1520 (v4f32 VR128:$dst),
1522 (CVTSI2SSrm_Int VR128:$dst, addr:$src)>;
1527 def VCVTPS2DQrr : VPDI<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1529 [(set VR128:$dst, (v4i32 (X86cvtp2Int (v4f32 VR128:$src))))]>,
1531 def VCVTPS2DQrm : VPDI<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1533 [(set VR128:$dst,
1547 def CVTPS2DQrr : PDI<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1549 [(set VR128:$dst, (v4i32 (X86cvtp2Int (v4f32 VR128:$src))))]>,
1551 def CVTPS2DQrm : PDI<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1553 [(set VR128:$dst,
1562 def VCVTPD2DQrr : SDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1564 [(set VR128:$dst,
1565 (v4i32 (X86cvtp2Int (v2f64 VR128:$src))))]>,
1569 def VCVTPD2DQrm : SDI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1571 [(set VR128:$dst,
1576 def VCVTPD2DQYrr : SDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR256:$src),
1578 [(set VR128:$dst,
1581 def VCVTPD2DQYrm : SDI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f256mem:$src),
1583 [(set VR128:$dst,
1589 def : Pat<(v4i32 (lrint VR128:$src)), (VCVTPS2DQrr VR128:$src)>;
1598 def : Pat<(v4i32 (lrint VR128:$src)), (CVTPS2DQrr VR128:$src)>;
1603 (VCVTPD2DQrr VR128:$dst, VR128:$src), 0, "att">;
1605 (VCVTPD2DQYrr VR128:$dst, VR256:$src), 0, "att">;
1607 def CVTPD2DQrm : SDI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1609 [(set VR128:$dst,
1612 def CVTPD2DQrr : SDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1614 [(set VR128:$dst,
1615 (v4i32 (X86cvtp2Int (v2f64 VR128:$src))))]>,
1622 def VCVTTPS2DQrr : VS2SI<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1624 [(set VR128:$dst,
1625 (v4i32 (X86any_cvttp2si (v4f32 VR128:$src))))]>,
1627 def VCVTTPS2DQrm : VS2SI<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1629 [(set VR128:$dst,
1645 def CVTTPS2DQrr : S2SI<0x5B, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1647 [(set VR128:$dst,
1648 (v4i32 (X86any_cvttp2si (v4f32 VR128:$src))))]>,
1650 def CVTTPS2DQrm : S2SI<0x5B, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1652 [(set VR128:$dst,
1662 def VCVTTPD2DQrr : VPDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1664 [(set VR128:$dst,
1665 (v4i32 (X86any_cvttp2si (v2f64 VR128:$src))))]>,
1667 def VCVTTPD2DQrm : VPDI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1669 [(set VR128:$dst,
1674 def VCVTTPD2DQYrr : VPDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR256:$src),
1676 [(set VR128:$dst,
1679 def VCVTTPD2DQYrm : VPDI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f256mem:$src),
1681 [(set VR128:$dst,
1687 (VCVTTPD2DQrr VR128:$dst, VR128:$src), 0, "att">;
1689 (VCVTTPD2DQYrr VR128:$dst, VR256:$src), 0, "att">;
1698 def CVTTPD2DQrr : PDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1700 [(set VR128:$dst,
1701 (v4i32 (X86any_cvttp2si (v2f64 VR128:$src))))]>,
1703 def CVTTPD2DQrm : PDI<0xE6, MRMSrcMem, (outs VR128:$dst),(ins f128mem:$src),
1705 [(set VR128:$dst,
1712 def VCVTPS2PDrr : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1714 [(set VR128:$dst, (v2f64 (X86any_vfpext (v4f32 VR128:$src))))]>,
1716 def VCVTPS2PDrm : I<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src),
1718 [(set VR128:$dst, (v2f64 (extloadv2f32 addr:$src)))]>,
1720 def VCVTPS2PDYrr : I<0x5A, MRMSrcReg, (outs VR256:$dst), (ins VR128:$src),
1722 [(set VR256:$dst, (v4f64 (any_fpextend (v4f32 VR128:$src))))]>,
1731 def CVTPS2PDrr : I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1733 [(set VR128:$dst, (v2f64 (X86any_vfpext (v4f32 VR128:$src))))]>,
1735 def CVTPS2PDrm : I<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src),
1737 [(set VR128:$dst, (v2f64 (extloadv2f32 addr:$src)))]>,
1744 def VCVTDQ2PDrm : S2SI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
1746 [(set VR128:$dst,
1752 def VCVTDQ2PDrr : S2SI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1754 [(set VR128:$dst,
1755 (v2f64 (X86any_VSintToFP (v4i32 VR128:$src))))]>,
1763 def VCVTDQ2PDYrr : S2SI<0xE6, MRMSrcReg, (outs VR256:$dst), (ins VR128:$src),
1766 (v4f64 (any_sint_to_fp (v4i32 VR128:$src))))]>,
1771 def CVTDQ2PDrm : S2SI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
1773 [(set VR128:$dst,
1779 def CVTDQ2PDrr : S2SI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1781 [(set VR128:$dst,
1782 (v2f64 (X86any_VSintToFP (v4i32 VR128:$src))))]>,
1803 def VCVTPD2PSrr : VPDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1805 [(set VR128:$dst, (v4f32 (X86any_vfpround (v2f64 VR128:$src))))]>,
1807 def VCVTPD2PSrm : VPDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1809 [(set VR128:$dst, (v4f32 (X86any_vfpround (loadv2f64 addr:$src))))]>,
1812 def VCVTPD2PSYrr : VPDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR256:$src),
1814 [(set VR128:$dst, (v4f32 (X86any_vfpround (v4f64 VR256:$src))))]>,
1816 def VCVTPD2PSYrm : VPDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f256mem:$src),
1818 [(set VR128:$dst, (v4f32 (X86any_vfpround (loadv4f64 addr:$src))))]>,
1823 (VCVTPD2PSrr VR128:$dst, VR128:$src), 0, "att">;
1825 (VCVTPD2PSYrr VR128:$dst, VR256:$src), 0, "att">;
1827 def CVTPD2PSrr : PDI<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
1829 [(set VR128:$dst, (v4f32 (X86any_vfpround (v2f64 VR128:$src))))]>,
1831 def CVTPD2PSrm : PDI<0x5A, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
1833 [(set VR128:$dst, (v4f32 (X86any_vfpround (memopv2f64 addr:$src))))]>,
1846 def rri_Int : SIi8<0xC2, MRMSrcReg, (outs VR128:$dst),
1847 (ins VR128:$src1, VR128:$src2, u8imm:$cc), asm,
1848 [(set VR128:$dst, (OpNode (VT VR128:$src1),
1849 VR128:$src2, timm:$cc))]>,
1852 def rmi_Int : SIi8<0xC2, MRMSrcMem, (outs VR128:$dst),
1853 (ins VR128:$src1, memop:$src2, u8imm:$cc), asm,
1854 [(set VR128:$dst, (OpNode (VT VR128:$src1),
1944 defm VUCOMISS : sse12_ord_cmp_int<0x2E, VR128, X86ucomi, v4f32, ssmem,
1946 defm VUCOMISD : sse12_ord_cmp_int<0x2E, VR128, X86ucomi, v2f64, sdmem,
1949 defm VCOMISS : sse12_ord_cmp_int<0x2F, VR128, X86comi, v4f32, ssmem,
1951 defm VCOMISD : sse12_ord_cmp_int<0x2F, VR128, X86comi, v2f64, sdmem,
1964 defm UCOMISS : sse12_ord_cmp_int<0x2E, VR128, X86ucomi, v4f32, ssmem,
1966 defm UCOMISD : sse12_ord_cmp_int<0x2E, VR128, X86ucomi, v2f64, sdmem,
1969 defm COMISS : sse12_ord_cmp_int<0x2F, VR128, X86comi, v4f32, ssmem,
1971 defm COMISD : sse12_ord_cmp_int<0x2F, VR128, X86comi, v2f64, sdmem,
1993 defm VCMPPS : sse12_cmp_packed<VR128, f128mem, v4f32,
1996 defm VCMPPD : sse12_cmp_packed<VR128, f128mem, v2f64,
2006 defm CMPPS : sse12_cmp_packed<VR128, f128mem, v4f32,
2009 defm CMPPD : sse12_cmp_packed<VR128, f128mem, v2f64,
2029 def : Pat<(v2f64 (X86any_cmpp (loadv2f64 addr:$src2), VR128:$src1,
2031 (VCMPPDrmi VR128:$src1, addr:$src2, timm:$cc)>;
2033 def : Pat<(v4f32 (X86any_cmpp (loadv4f32 addr:$src2), VR128:$src1,
2035 (VCMPPSrmi VR128:$src1, addr:$src2, timm:$cc)>;
2047 def : Pat<(v2f64 (X86any_cmpp (memopv2f64 addr:$src2), VR128:$src1,
2049 (CMPPDrmi VR128:$src1, addr:$src2, timm:$cc)>;
2057 def : Pat<(v4f32 (X86any_cmpp (memopv4f32 addr:$src2), VR128:$src1,
2059 (CMPPSrmi VR128:$src1, addr:$src2, timm:$cc)>;
2089 defm VSHUFPS : sse12_shuffle<VR128, f128mem, v4f32,
2097 defm VSHUFPD : sse12_shuffle<VR128, f128mem, v2f64,
2107 defm SHUFPS : sse12_shuffle<VR128, f128mem, v4f32,
2110 defm SHUFPD : sse12_shuffle<VR128, f128mem, v2f64,
2141 VR128, f128mem, "unpckhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2144 VR128, f128mem, "unpckhpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2147 VR128, f128mem, "unpcklps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2150 VR128, f128mem, "unpcklpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2169 VR128, f128mem, "unpckhps\t{$src2, $dst|$dst, $src2}",
2172 VR128, f128mem, "unpckhpd\t{$src2, $dst|$dst, $src2}",
2175 VR128, f128mem, "unpcklps\t{$src2, $dst|$dst, $src2}",
2178 VR128, f128mem, "unpcklpd\t{$src2, $dst|$dst, $src2}",
2204 def : Pat<(v2f64 (X86Unpckl VR128:$src1,
2206 (MOVHPDrm VR128:$src1, addr:$src2)>;
2223 defm VMOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
2225 defm VMOVMSKPD : sse12_extr_sign_mask<VR128, v2f64, "movmskpd",
2233 def : Pat<(X86movmsk (v4i32 VR128:$src)),
2234 (VMOVMSKPSrr VR128:$src)>;
2235 def : Pat<(X86movmsk (v2i64 VR128:$src)),
2236 (VMOVMSKPDrr VR128:$src)>;
2243 defm MOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
2245 defm MOVMSKPD : sse12_extr_sign_mask<VR128, v2f64, "movmskpd",
2250 def : Pat<(X86movmsk (v4i32 VR128:$src)),
2251 (MOVMSKPSrr VR128:$src)>;
2252 def : Pat<(X86movmsk (v2i64 VR128:$src)),
2253 (MOVMSKPDrr VR128:$src)>;
2291 VR128, load, i128mem, sched.XMM,
2295 defm NAME : PDI_binop_rm<opc, OpcodeStr, Opcode, OpVT128, VR128,
2334 defm V#NAME#PS : sse12_fp_packed_logical_rm<opc, VR128, SSEPackedSingle,
2338 defm V#NAME#PD : sse12_fp_packed_logical_rm<opc, VR128, SSEPackedDouble,
2344 defm PS : sse12_fp_packed_logical_rm<opc, VR128, SSEPackedSingle,
2348 defm PD : sse12_fp_packed_logical_rm<opc, VR128, SSEPackedDouble,
2495 def : Pat<(v16i8 (and VR128:$src1, VR128:$src2)),
2496 (VPANDrr VR128:$src1, VR128:$src2)>;
2497 def : Pat<(v8i16 (and VR128:$src1, VR128:$src2)),
2498 (VPANDrr VR128:$src1, VR128:$src2)>;
2499 def : Pat<(v4i32 (and VR128:$src1, VR128:$src2)),
2500 (VPANDrr VR128:$src1, VR128:$src2)>;
2502 def : Pat<(v16i8 (or VR128:$src1, VR128:$src2)),
2503 (VPORrr VR128:$src1, VR128:$src2)>;
2504 def : Pat<(v8i16 (or VR128:$src1, VR128:$src2)),
2505 (VPORrr VR128:$src1, VR128:$src2)>;
2506 def : Pat<(v4i32 (or VR128:$src1, VR128:$src2)),
2507 (VPORrr VR128:$src1, VR128:$src2)>;
2509 def : Pat<(v16i8 (xor VR128:$src1, VR128:$src2)),
2510 (VPXORrr VR128:$src1, VR128:$src2)>;
2511 def : Pat<(v8i16 (xor VR128:$src1, VR128:$src2)),
2512 (VPXORrr VR128:$src1, VR128:$src2)>;
2513 def : Pat<(v4i32 (xor VR128:$src1, VR128:$src2)),
2514 (VPXORrr VR128:$src1, VR128:$src2)>;
2516 def : Pat<(v16i8 (X86andnp VR128:$src1, VR128:$src2)),
2517 (VPANDNrr VR128:$src1, VR128:$src2)>;
2518 def : Pat<(v8i16 (X86andnp VR128:$src1, VR128:$src2)),
2519 (VPANDNrr VR128:$src1, VR128:$src2)>;
2520 def : Pat<(v4i32 (X86andnp VR128:$src1, VR128:$src2)),
2521 (VPANDNrr VR128:$src1, VR128:$src2)>;
2523 def : Pat<(and VR128:$src1, (loadv16i8 addr:$src2)),
2524 (VPANDrm VR128:$src1, addr:$src2)>;
2525 def : Pat<(and VR128:$src1, (loadv8i16 addr:$src2)),
2526 (VPANDrm VR128:$src1, addr:$src2)>;
2527 def : Pat<(and VR128:$src1, (loadv4i32 addr:$src2)),
2528 (VPANDrm VR128:$src1, addr:$src2)>;
2530 def : Pat<(or VR128:$src1, (loadv16i8 addr:$src2)),
2531 (VPORrm VR128:$src1, addr:$src2)>;
2532 def : Pat<(or VR128:$src1, (loadv8i16 addr:$src2)),
2533 (VPORrm VR128:$src1, addr:$src2)>;
2534 def : Pat<(or VR128:$src1, (loadv4i32 addr:$src2)),
2535 (VPORrm VR128:$src1, addr:$src2)>;
2537 def : Pat<(xor VR128:$src1, (loadv16i8 addr:$src2)),
2538 (VPXORrm VR128:$src1, addr:$src2)>;
2539 def : Pat<(xor VR128:$src1, (loadv8i16 addr:$src2)),
2540 (VPXORrm VR128:$src1, addr:$src2)>;
2541 def : Pat<(xor VR128:$src1, (loadv4i32 addr:$src2)),
2542 (VPXORrm VR128:$src1, addr:$src2)>;
2544 def : Pat<(X86andnp VR128:$src1, (loadv16i8 addr:$src2)),
2545 (VPANDNrm VR128:$src1, addr:$src2)>;
2546 def : Pat<(X86andnp VR128:$src1, (loadv8i16 addr:$src2)),
2547 (VPANDNrm VR128:$src1, addr:$src2)>;
2548 def : Pat<(X86andnp VR128:$src1, (loadv4i32 addr:$src2)),
2549 (VPANDNrm VR128:$src1, addr:$src2)>;
2553 def : Pat<(v16i8 (and VR128:$src1, VR128:$src2)),
2554 (PANDrr VR128:$src1, VR128:$src2)>;
2555 def : Pat<(v8i16 (and VR128:$src1, VR128:$src2)),
2556 (PANDrr VR128:$src1, VR128:$src2)>;
2557 def : Pat<(v4i32 (and VR128:$src1, VR128:$src2)),
2558 (PANDrr VR128:$src1, VR128:$src2)>;
2560 def : Pat<(v16i8 (or VR128:$src1, VR128:$src2)),
2561 (PORrr VR128:$src1, VR128:$src2)>;
2562 def : Pat<(v8i16 (or VR128:$src1, VR128:$src2)),
2563 (PORrr VR128:$src1, VR128:$src2)>;
2564 def : Pat<(v4i32 (or VR128:$src1, VR128:$src2)),
2565 (PORrr VR128:$src1, VR128:$src2)>;
2567 def : Pat<(v16i8 (xor VR128:$src1, VR128:$src2)),
2568 (PXORrr VR128:$src1, VR128:$src2)>;
2569 def : Pat<(v8i16 (xor VR128:$src1, VR128:$src2)),
2570 (PXORrr VR128:$src1, VR128:$src2)>;
2571 def : Pat<(v4i32 (xor VR128:$src1, VR128:$src2)),
2572 (PXORrr VR128:$src1, VR128:$src2)>;
2574 def : Pat<(v16i8 (X86andnp VR128:$src1, VR128:$src2)),
2575 (PANDNrr VR128:$src1, VR128:$src2)>;
2576 def : Pat<(v8i16 (X86andnp VR128:$src1, VR128:$src2)),
2577 (PANDNrr VR128:$src1, VR128:$src2)>;
2578 def : Pat<(v4i32 (X86andnp VR128:$src1, VR128:$src2)),
2579 (PANDNrr VR128:$src1, VR128:$src2)>;
2581 def : Pat<(and VR128:$src1, (memopv16i8 addr:$src2)),
2582 (PANDrm VR128:$src1, addr:$src2)>;
2583 def : Pat<(and VR128:$src1, (memopv8i16 addr:$src2)),
2584 (PANDrm VR128:$src1, addr:$src2)>;
2585 def : Pat<(and VR128:$src1, (memopv4i32 addr:$src2)),
2586 (PANDrm VR128:$src1, addr:$src2)>;
2588 def : Pat<(or VR128:$src1, (memopv16i8 addr:$src2)),
2589 (PORrm VR128:$src1, addr:$src2)>;
2590 def : Pat<(or VR128:$src1, (memopv8i16 addr:$src2)),
2591 (PORrm VR128:$src1, addr:$src2)>;
2592 def : Pat<(or VR128:$src1, (memopv4i32 addr:$src2)),
2593 (PORrm VR128:$src1, addr:$src2)>;
2595 def : Pat<(xor VR128:$src1, (memopv16i8 addr:$src2)),
2596 (PXORrm VR128:$src1, addr:$src2)>;
2597 def : Pat<(xor VR128:$src1, (memopv8i16 addr:$src2)),
2598 (PXORrm VR128:$src1, addr:$src2)>;
2599 def : Pat<(xor VR128:$src1, (memopv4i32 addr:$src2)),
2600 (PXORrm VR128:$src1, addr:$src2)>;
2602 def : Pat<(X86andnp VR128:$src1, (memopv16i8 addr:$src2)),
2603 (PANDNrm VR128:$src1, addr:$src2)>;
2604 def : Pat<(X86andnp VR128:$src1, (memopv8i16 addr:$src2)),
2605 (PANDNrm VR128:$src1, addr:$src2)>;
2606 def : Pat<(X86andnp VR128:$src1, (memopv4i32 addr:$src2)),
2607 (PANDNrm VR128:$src1, addr:$src2)>;
2611 def : Pat<(v4f32 (X86fand VR128:$src1, VR128:$src2)),
2612 (ANDPSrr VR128:$src1, VR128:$src2)>;
2613 def : Pat<(v4f32 (X86for VR128:$src1, VR128:$src2)),
2614 (ORPSrr VR128:$src1, VR128:$src2)>;
2615 def : Pat<(v4f32 (X86fxor VR128:$src1, VR128:$src2)),
2616 (XORPSrr VR128:$src1, VR128:$src2)>;
2617 def : Pat<(v4f32 (X86fandn VR128:$src1, VR128:$src2)),
2618 (ANDNPSrr VR128:$src1, VR128:$src2)>;
2620 def : Pat<(X86fand VR128:$src1, (memopv4f32 addr:$src2)),
2621 (ANDPSrm VR128:$src1, addr:$src2)>;
2622 def : Pat<(X86for VR128:$src1, (memopv4f32 addr:$src2)),
2623 (ORPSrm VR128:$src1, addr:$src2)>;
2624 def : Pat<(X86fxor VR128:$src1, (memopv4f32 addr:$src2)),
2625 (XORPSrm VR128:$src1, addr:$src2)>;
2626 def : Pat<(X86fandn VR128:$src1, (memopv4f32 addr:$src2)),
2627 (ANDNPSrm VR128:$src1, addr:$src2)>;
2651 VR128, v4f32, f128mem, loadv4f32,
2654 VR128, v2f64, f128mem, loadv2f64,
2666 defm PS : sse12_fp_packed<opc, !strconcat(OpcodeStr, "ps"), OpNode, VR128,
2669 defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128,
2701 defm V#NAME#SS : sse12_fp_scalar_int<opc, OpNode, VR128, v4f32,
2704 defm V#NAME#SD : sse12_fp_scalar_int<opc, OpNode, VR128, v2f64,
2709 defm SS : sse12_fp_scalar_int<opc, OpNode, VR128, v4f32,
2712 defm SD : sse12_fp_scalar_int<opc, OpNode, VR128, v2f64,
2796 def : Pat<(VT (Move (VT VR128:$dst),
2798 (Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),
2801 (VT (COPY_TO_REGCLASS RC:$src, VR128)))>;
2802 def : Pat<(VT (Move (VT VR128:$dst),
2804 (Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),
2812 def : Pat<(VT (Move (VT VR128:$dst),
2814 (Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),
2817 (VT (COPY_TO_REGCLASS RC:$src, VR128)))>;
2818 def : Pat<(VT (Move (VT VR128:$dst),
2820 (Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),
2865 def r_Int : I<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
2869 def m_Int : I<opc, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, intmemop:$src2),
2881 def : Pat<(Intr VR128:$src),
2882 (!cast<Instruction>(NAME#r_Int) VR128:$src, VR128:$src)>;
2901 def : Pat<(Intr VR128:$src),
2902 (!cast<Instruction>(NAME#r_Int) VR128:$src,
2903 VR128:$src)>;
2926 def r_Int : I<opc, MRMSrcReg, (outs VR128:$dst),
2927 (ins VR128:$src1, VR128:$src2),
2931 def m_Int : I<opc, MRMSrcMem, (outs VR128:$dst),
2932 (ins VR128:$src1, intmemop:$src2),
2961 def V#NAME#PSr : PSI<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
2964 [(set VR128:$dst, (v4f32 (OpNode VR128:$src)))]>,
2966 def V#NAME#PSm : PSI<opc, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
2969 [(set VR128:$dst, (OpNode (loadv4f32 addr:$src)))]>,
2983 def PSr : PSI<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
2985 [(set VR128:$dst, (v4f32 (OpNode VR128:$src)))]>,
2987 def PSm : PSI<opc, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
2989 [(set VR128:$dst, (OpNode (memopv4f32 addr:$src)))]>,
2997 def V#NAME#PDr : PDI<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
3000 [(set VR128:$dst, (v2f64 (OpNode VR128:$src)))]>,
3002 def V#NAME#PDm : PDI<opc, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
3005 [(set VR128:$dst, (OpNode (loadv2f64 addr:$src)))]>,
3019 def PDr : PDI<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
3021 [(set VR128:$dst, (v2f64 (OpNode VR128:$src)))]>,
3023 def PDm : PDI<opc, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
3025 [(set VR128:$dst, (OpNode (memopv2f64 addr:$src)))]>,
3122 (ins f128mem:$dst, VR128:$src),
3124 [(alignednontemporalstore (v4f32 VR128:$src),
3127 (ins f128mem:$dst, VR128:$src),
3129 [(alignednontemporalstore (v2f64 VR128:$src),
3148 (ins i128mem:$dst, VR128:$src),
3150 [(alignednontemporalstore (v2i64 VR128:$src),
3163 def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
3165 [(alignednontemporalstore (v4f32 VR128:$src), addr:$dst)]>;
3166 def MOVNTPDmr : PDI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
3168 [(alignednontemporalstore(v2f64 VR128:$src), addr:$dst)]>;
3172 def MOVNTDQmr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
3174 [(alignednontemporalstore (v2i64 VR128:$src), addr:$dst)]>;
3198 def : Pat<(alignednontemporalstore (v4i32 VR128:$src), addr:$dst),
3199 (VMOVNTDQmr addr:$dst, VR128:$src)>;
3200 def : Pat<(alignednontemporalstore (v8i16 VR128:$src), addr:$dst),
3201 (VMOVNTDQmr addr:$dst, VR128:$src)>;
3202 def : Pat<(alignednontemporalstore (v8f16 VR128:$src), addr:$dst),
3203 (VMOVNTDQmr addr:$dst, VR128:$src)>;
3204 def : Pat<(alignednontemporalstore (v16i8 VR128:$src), addr:$dst),
3205 (VMOVNTDQmr addr:$dst, VR128:$src)>;
3209 def : Pat<(alignednontemporalstore (v4i32 VR128:$src), addr:$dst),
3210 (MOVNTDQmr addr:$dst, VR128:$src)>;
3211 def : Pat<(alignednontemporalstore (v8i16 VR128:$src), addr:$dst),
3212 (MOVNTDQmr addr:$dst, VR128:$src)>;
3213 def : Pat<(alignednontemporalstore (v8f16 VR128:$src), addr:$dst),
3214 (MOVNTDQmr addr:$dst, VR128:$src)>;
3215 def : Pat<(alignednontemporalstore (v16i8 VR128:$src), addr:$dst),
3216 (MOVNTDQmr addr:$dst, VR128:$src)>;
3295 def VMOVDQArr : VPDI<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
3298 def VMOVDQUrr : VSSI<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
3311 def VMOVDQArr_REV : VPDI<0x7F, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
3319 def VMOVDQUrr_REV : VSSI<0x7F, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
3331 def VMOVDQArm : VPDI<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
3333 [(set VR128:$dst, (alignedloadv2i64 addr:$src))]>,
3339 def VMOVDQUrm : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
3341 [(set VR128:$dst, (loadv2i64 addr:$src))]>,
3352 (ins i128mem:$dst, VR128:$src),
3354 [(alignedstore (v2i64 VR128:$src), addr:$dst)]>,
3360 def VMOVDQUmr : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
3362 [(store (v2i64 VR128:$src), addr:$dst)]>,
3371 def MOVDQArr : PDI<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
3374 def MOVDQUrr : I<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
3381 def MOVDQArr_REV : PDI<0x7F, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
3384 def MOVDQUrr_REV : I<0x7F, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
3392 def MOVDQArm : PDI<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
3394 [/*(set VR128:$dst, (alignedloadv2i64 addr:$src))*/]>;
3395 def MOVDQUrm : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
3397 [/*(set VR128:$dst, (loadv2i64 addr:$src))*/]>,
3403 def MOVDQAmr : PDI<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
3405 [/*(alignedstore (v2i64 VR128:$src), addr:$dst)*/]>;
3406 def MOVDQUmr : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
3408 [/*(store (v2i64 VR128:$src), addr:$dst)*/]>,
3416 (VMOVDQArr_REV VR128:$dst, VR128:$src), 0>;
3420 (VMOVDQUrr_REV VR128:$dst, VR128:$src), 0>;
3426 (MOVDQArr_REV VR128:$dst, VR128:$src), 0>;
3428 (MOVDQUrr_REV VR128:$dst, VR128:$src), 0>;
3449 def : Pat<(alignedstore (v4i32 VR128:$src), addr:$dst),
3450 (VMOVDQAmr addr:$dst, VR128:$src)>;
3451 def : Pat<(alignedstore (v8i16 VR128:$src), addr:$dst),
3452 (VMOVDQAmr addr:$dst, VR128:$src)>;
3453 def : Pat<(alignedstore (v8f16 VR128:$src), addr:$dst),
3454 (VMOVDQAmr addr:$dst, VR128:$src)>;
3455 def : Pat<(alignedstore (v16i8 VR128:$src), addr:$dst),
3456 (VMOVDQAmr addr:$dst, VR128:$src)>;
3457 def : Pat<(store (v4i32 VR128:$src), addr:$dst),
3458 (VMOVDQUmr addr:$dst, VR128:$src)>;
3459 def : Pat<(store (v8i16 VR128:$src), addr:$dst),
3460 (VMOVDQUmr addr:$dst, VR128:$src)>;
3461 def : Pat<(store (v8f16 VR128:$src), addr:$dst),
3462 (VMOVDQUmr addr:$dst, VR128:$src)>;
3463 def : Pat<(store (v16i8 VR128:$src), addr:$dst),
3464 (VMOVDQUmr addr:$dst, VR128:$src)>;
3551 defm VPMADDWD : PDI_binop_rm2<0xF5, "vpmaddwd", X86vpmaddwd, v4i32, v8i16, VR128,
3560 defm PMADDWD : PDI_binop_rm2<0xF5, "pmaddwd", X86vpmaddwd, v4i32, v8i16, VR128,
3564 defm VPSADBW : PDI_binop_rm2<0xF6, "vpsadbw", X86psadbw, v2i64, v16i8, VR128,
3572 defm PSADBW : PDI_binop_rm2<0xF6, "psadbw", X86psadbw, v2i64, v16i8, VR128,
3588 (ins RC:$src1, VR128:$src2),
3592 [(set RC:$dst, (DstVT (OpNode RC:$src1, (SrcVT VR128:$src2))))]>,
3619 OpNode, OpNode2, VR128, sched.XMM, schedImm.XMM,
3628 VR128, sched.XMM, schedImm.XMM, DstVT128, SrcVT,
3647 VR128, v16i8, sched.XMM, 0>, VEX, VVVV, WIG;
3653 defm NAME : PDI_binop_ri<opc, ImmForm, OpcodeStr, OpNode, VR128, v16i8,
3717 def V#NAME#ri : Ii8<0x70, MRMSrcReg, (outs VR128:$dst),
3718 (ins VR128:$src1, u8imm:$src2),
3721 [(set VR128:$dst,
3722 (vt128 (OpNode VR128:$src1, (i8 timm:$src2))))]>,
3724 def V#NAME#mi : Ii8<0x70, MRMSrcMem, (outs VR128:$dst),
3728 [(set VR128:$dst,
3754 (outs VR128:$dst), (ins VR128:$src1, u8imm:$src2),
3757 [(set VR128:$dst,
3758 (vt128 (OpNode VR128:$src1, (i8 timm:$src2))))]>,
3761 (outs VR128:$dst), (ins i128mem:$src1, u8imm:$src2),
3764 [(set VR128:$dst,
3835 defm VPACKSSWB : sse2_pack<0x63, "vpacksswb", v16i8, v8i16, X86Packss, VR128,
3838 defm VPACKSSDW : sse2_pack<0x6B, "vpackssdw", v8i16, v4i32, X86Packss, VR128,
3842 defm VPACKUSWB : sse2_pack<0x67, "vpackuswb", v16i8, v8i16, X86Packus, VR128,
3845 defm VPACKUSDW : sse4_pack<0x2B, "vpackusdw", v8i16, v4i32, X86Packus, VR128,
3867 defm PACKSSWB : sse2_pack<0x63, "packsswb", v16i8, v8i16, X86Packss, VR128,
3869 defm PACKSSDW : sse2_pack<0x6B, "packssdw", v8i16, v4i32, X86Packss, VR128,
3872 defm PACKUSWB : sse2_pack<0x67, "packuswb", v16i8, v8i16, X86Packus, VR128,
3875 defm PACKUSDW : sse4_pack<0x2B, "packusdw", v8i16, v4i32, X86Packus, VR128,
3906 defm VPUNPCKLBW : sse2_unpack<0x60, "vpunpcklbw", v16i8, X86Unpckl, VR128,
3909 defm VPUNPCKLWD : sse2_unpack<0x61, "vpunpcklwd", v8i16, X86Unpckl, VR128,
3912 defm VPUNPCKHBW : sse2_unpack<0x68, "vpunpckhbw", v16i8, X86Unpckh, VR128,
3915 defm VPUNPCKHWD : sse2_unpack<0x69, "vpunpckhwd", v8i16, X86Unpckh, VR128,
3921 defm VPUNPCKLDQ : sse2_unpack<0x62, "vpunpckldq", v4i32, X86Unpckl, VR128,
3924 defm VPUNPCKLQDQ : sse2_unpack<0x6C, "vpunpcklqdq", v2i64, X86Unpckl, VR128,
3927 defm VPUNPCKHDQ : sse2_unpack<0x6A, "vpunpckhdq", v4i32, X86Unpckh, VR128,
3930 defm VPUNPCKHQDQ : sse2_unpack<0x6D, "vpunpckhqdq", v2i64, X86Unpckh, VR128,
3966 defm PUNPCKLBW : sse2_unpack<0x60, "punpcklbw", v16i8, X86Unpckl, VR128,
3968 defm PUNPCKLWD : sse2_unpack<0x61, "punpcklwd", v8i16, X86Unpckl, VR128,
3970 defm PUNPCKLDQ : sse2_unpack<0x62, "punpckldq", v4i32, X86Unpckl, VR128,
3972 defm PUNPCKLQDQ : sse2_unpack<0x6C, "punpcklqdq", v2i64, X86Unpckl, VR128,
3975 defm PUNPCKHBW : sse2_unpack<0x68, "punpckhbw", v16i8, X86Unpckh, VR128,
3977 defm PUNPCKHWD : sse2_unpack<0x69, "punpckhwd", v8i16, X86Unpckh, VR128,
3979 defm PUNPCKHDQ : sse2_unpack<0x6A, "punpckhdq", v4i32, X86Unpckh, VR128,
3981 defm PUNPCKHQDQ : sse2_unpack<0x6D, "punpckhqdq", v2i64, X86Unpckh, VR128,
3993 (outs VR128:$dst), (ins VR128:$src1,
3998 [(set VR128:$dst,
3999 (X86pinsrw VR128:$src1, GR32orGR64:$src2, timm:$src3))]>,
4002 (outs VR128:$dst), (ins VR128:$src1,
4007 [(set VR128:$dst,
4008 (X86pinsrw VR128:$src1, (extloadi16 addr:$src2),
4016 (outs GR32orGR64:$dst), (ins VR128:$src1, u8imm:$src2),
4018 [(set GR32orGR64:$dst, (X86pextrw (v8i16 VR128:$src1),
4022 (outs GR32orGR64:$dst), (ins VR128:$src1, u8imm:$src2),
4024 [(set GR32orGR64:$dst, (X86pextrw (v8i16 VR128:$src1),
4040 … addr:$dst, (EXTRACT_SUBREG (PEXTRWrr (v8i16 (COPY_TO_REGCLASS FR16:$src, VR128)), 0), sub_16bit))…
4041 …f16:$src)), (EXTRACT_SUBREG (PEXTRWrr (v8i16 (COPY_TO_REGCLASS FR16:$src, VR128)), 0), sub_16bit)>;
4047 …16:$src)), (EXTRACT_SUBREG (VPEXTRWrr (v8i16 (COPY_TO_REGCLASS FR16:$src, VR128)), 0), sub_16bit)>;
4058 (ins VR128:$src),
4060 [(set GR32orGR64:$dst, (X86movmsk (v16i8 VR128:$src)))]>,
4071 def PMOVMSKBrr : PDI<0xD7, MRMSrcReg, (outs GR32orGR64:$dst), (ins VR128:$src),
4073 [(set GR32orGR64:$dst, (X86movmsk (v16i8 VR128:$src)))]>,
4088 (ins VR128:$src, VR128:$mask),
4090 [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, RDI)]>,
4094 (ins VR128:$src, VR128:$mask),
4096 [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>,
4100 def MASKMOVDQU64 : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
4102 [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, RDI)]>;
4104 def MASKMOVDQU : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
4106 [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>;
4118 def VMOVDI2PDIrr : VS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src),
4120 [(set VR128:$dst,
4123 def VMOVDI2PDIrm : VS2I<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src),
4125 [(set VR128:$dst,
4128 def VMOV64toPQIrr : VRS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
4130 [(set VR128:$dst,
4134 def VMOV64toPQIrm : VRS2I<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
4143 def MOVDI2PDIrr : S2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR32:$src),
4145 [(set VR128:$dst,
4148 def MOVDI2PDIrm : S2I<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src),
4150 [(set VR128:$dst,
4153 def MOV64toPQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
4155 [(set VR128:$dst,
4159 def MOV64toPQIrm : RS2I<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
4189 def VMOVPDI2DIrr : VS2I<0x7E, MRMDestReg, (outs GR32:$dst), (ins VR128:$src),
4191 [(set GR32:$dst, (extractelt (v4i32 VR128:$src),
4195 (ins i32mem:$dst, VR128:$src),
4197 [(store (i32 (extractelt (v4i32 VR128:$src),
4200 def MOVPDI2DIrr : S2I<0x7E, MRMDestReg, (outs GR32:$dst), (ins VR128:$src),
4202 [(set GR32:$dst, (extractelt (v4i32 VR128:$src),
4205 def MOVPDI2DImr : S2I<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR128:$src),
4207 [(store (i32 (extractelt (v4i32 VR128:$src),
4217 def VMOVPQIto64rr : VRS2I<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src),
4219 [(set GR64:$dst, (extractelt (v2i64 VR128:$src),
4223 def MOVPQIto64rr : RS2I<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src),
4225 [(set GR64:$dst, (extractelt (v2i64 VR128:$src),
4231 (ins i64mem:$dst, VR128:$src),
4235 def MOVPQIto64mr : RS2I<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src),
4301 (MOV64toPQIrr VR128:$dst, GR64:$src), 0>;
4303 (MOVPQIto64rr GR64:$dst, VR128:$src), 0>;
4306 (VMOV64toPQIrr VR128:$dst, GR64:$src), 0>;
4308 (VMOVPQIto64rr GR64:$dst, VR128:$src), 0>;
4319 def VMOVQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
4321 [(set VR128:$dst,
4324 def MOVQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src),
4326 [(set VR128:$dst,
4335 def VMOVPQI2QImr : VS2I<0xD6, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src),
4337 [(store (i64 (extractelt (v2i64 VR128:$src),
4340 def MOVPQI2QImr : S2I<0xD6, MRMDestMem, (outs), (ins i64mem:$dst, VR128:$src),
4342 [(store (i64 (extractelt (v2i64 VR128:$src),
4349 def VMOVPQI2QIrr : VS2I<0xD6, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
4351 def MOVPQI2QIrr : S2I<0xD6, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
4356 (VMOVPQI2QIrr VR128:$dst, VR128:$src), 0>;
4358 (MOVPQI2QIrr VR128:$dst, VR128:$src), 0>;
4366 def : Pat<(X86vextractstore64 (v2i64 VR128:$src), addr:$dst),
4367 (VMOVPQI2QImr addr:$dst, VR128:$src)>;
4373 def : Pat<(X86vextractstore64 (v2i64 VR128:$src), addr:$dst),
4374 (MOVPQI2QImr addr:$dst, VR128:$src)>;
4382 def VMOVZPQILo2PQIrr : I<0x7E, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
4384 [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 VR128:$src))))]>,
4386 def MOVZPQILo2PQIrr : I<0x7E, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
4388 [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 VR128:$src))))]>,
4393 def : Pat<(v2f64 (X86vzmovl (v2f64 VR128:$src))),
4394 (VMOVZPQILo2PQIrr VR128:$src)>;
4397 def : Pat<(v2f64 (X86vzmovl (v2f64 VR128:$src))),
4398 (MOVZPQILo2PQIrr VR128:$src)>;
4433 v4f32, VR128, loadv4f32, f128mem,
4436 v4f32, VR128, loadv4f32, f128mem,
4445 defm MOVSHDUP : sse3_replicate_sfp<0x16, X86Movshdup, "movshdup", v4f32, VR128,
4447 defm MOVSLDUP : sse3_replicate_sfp<0x12, X86Movsldup, "movsldup", v4f32, VR128,
4451 def : Pat<(v4i32 (X86Movshdup VR128:$src)),
4452 (VMOVSHDUPrr VR128:$src)>;
4455 def : Pat<(v4i32 (X86Movsldup VR128:$src)),
4456 (VMOVSLDUPrr VR128:$src)>;
4470 def : Pat<(v4i32 (X86Movshdup VR128:$src)),
4471 (MOVSHDUPrr VR128:$src)>;
4474 def : Pat<(v4i32 (X86Movsldup VR128:$src)),
4475 (MOVSLDUPrr VR128:$src)>;
4485 def rr : S3DI<0x12, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
4487 [(set VR128:$dst, (v2f64 (X86Movddup VR128:$src)))]>,
4489 def rm : S3DI<0x12, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src),
4491 [(set VR128:$dst,
4535 def VLDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
4537 [(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>,
4545 def LDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
4547 [(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>,
4577 defm VADDSUBPS : sse3_addsub<"vaddsubps", v4f32, VR128, f128mem,
4585 defm VADDSUBPD : sse3_addsub<"vaddsubpd", v2f64, VR128, f128mem,
4595 defm ADDSUBPS : sse3_addsub<"addsubps", v4f32, VR128, f128mem,
4598 defm ADDSUBPD : sse3_addsub<"addsubpd", v2f64, VR128, f128mem,
4650 defm VHADDPS : S3D_Int<0x7C, "vhaddps", v4f32, VR128, f128mem,
4652 defm VHSUBPS : S3D_Int<0x7D, "vhsubps", v4f32, VR128, f128mem,
4660 defm VHADDPD : S3_Int<0x7C, "vhaddpd", v2f64, VR128, f128mem,
4662 defm VHSUBPD : S3_Int<0x7D, "vhsubpd", v2f64, VR128, f128mem,
4673 defm HADDPS : S3D_Int<0x7C, "haddps", v4f32, VR128, f128mem, X86fhadd,
4675 defm HSUBPS : S3D_Int<0x7D, "hsubps", v4f32, VR128, f128mem, X86fhsub,
4679 defm HADDPD : S3_Int<0x7C, "haddpd", v2f64, VR128, f128mem, X86fhadd,
4681 defm HSUBPD : S3_Int<0x7D, "hsubpd", v2f64, VR128, f128mem, X86fhsub,
4693 def rr : SS38I<opc, MRMSrcReg, (outs VR128:$dst),
4694 (ins VR128:$src),
4696 [(set VR128:$dst, (vt (OpNode VR128:$src)))]>,
4699 def rm : SS38I<opc, MRMSrcMem, (outs VR128:$dst),
4702 [(set VR128:$dst,
4784 def rr : SS38I<opc, MRMSrcReg, (outs VR128:$dst),
4785 (ins VR128:$src1, VR128:$src2),
4789 [(set VR128:$dst, (IntId128 VR128:$src1, VR128:$src2))]>,
4791 def rm : SS38I<opc, MRMSrcMem, (outs VR128:$dst),
4792 (ins VR128:$src1, i128mem:$src2),
4796 [(set VR128:$dst,
4797 (IntId128 VR128:$src1, (ld_frag addr:$src2)))]>,
4821 VR128, load, i128mem,
4824 v16i8, VR128, load, i128mem,
4828 VR128, load, i128mem,
4834 defm VPHADDW : SS3I_binop_rm<0x01, "vphaddw", X86hadd, v8i16, v8i16, VR128,
4837 defm VPHADDD : SS3I_binop_rm<0x02, "vphaddd", X86hadd, v4i32, v4i32, VR128,
4840 defm VPHSUBW : SS3I_binop_rm<0x05, "vphsubw", X86hsub, v8i16, v8i16, VR128,
4843 defm VPHSUBD : SS3I_binop_rm<0x06, "vphsubd", X86hsub, v4i32, v4i32, VR128,
4910 defm PHADDW : SS3I_binop_rm<0x01, "phaddw", X86hadd, v8i16, v8i16, VR128,
4912 defm PHADDD : SS3I_binop_rm<0x02, "phaddd", X86hadd, v4i32, v4i32, VR128,
4914 defm PHSUBW : SS3I_binop_rm<0x05, "phsubw", X86hsub, v8i16, v8i16, VR128,
4916 defm PHSUBD : SS3I_binop_rm<0x06, "phsubd", X86hsub, v4i32, v4i32, VR128,
4924 defm PSHUFB : SS3I_binop_rm<0x00, "pshufb", X86pshufb, v16i8, v16i8, VR128,
4933 v16i8, VR128, memop, i128mem,
4937 VR128, memop, i128mem, SchedWriteVecIMul.XMM>;
4971 defm VPALIGNR : ssse3_palignr<"vpalignr", v16i8, VR128, load, i128mem,
4977 defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, memop, i128mem,
5025 defm NAME : SS41I_pmovx_rrrm<opc, OpcodeStr, MemOp, VR128, VR128,
5029 VR128, VR128, SchedWriteVecExtend.XMM>,
5033 VR256, VR128, SchedWriteVecExtend.YMM>,
5060 def : Pat<(v16i16 (ExtOp (v16i8 VR128:$src))),
5061 (!cast<I>(OpcPrefix#BWYrr) VR128:$src)>;
5064 def : Pat<(v8i32 (InVecOp (v16i8 VR128:$src))),
5065 (!cast<I>(OpcPrefix#BDYrr) VR128:$src)>;
5066 def : Pat<(v4i64 (InVecOp (v16i8 VR128:$src))),
5067 (!cast<I>(OpcPrefix#BQYrr) VR128:$src)>;
5069 def : Pat<(v8i32 (ExtOp (v8i16 VR128:$src))),
5070 (!cast<I>(OpcPrefix#WDYrr) VR128:$src)>;
5071 def : Pat<(v4i64 (InVecOp (v8i16 VR128:$src))),
5072 (!cast<I>(OpcPrefix#WQYrr) VR128:$src)>;
5074 def : Pat<(v4i64 (ExtOp (v4i32 VR128:$src))),
5075 (!cast<I>(OpcPrefix#DQYrr) VR128:$src)>;
5138 def : Pat<(v8i16 (ExtOp (v16i8 VR128:$src))),
5139 (!cast<I>(OpcPrefix#BWrr) VR128:$src)>;
5142 def : Pat<(v4i32 (ExtOp (v16i8 VR128:$src))),
5143 (!cast<I>(OpcPrefix#BDrr) VR128:$src)>;
5144 def : Pat<(v2i64 (ExtOp (v16i8 VR128:$src))),
5145 (!cast<I>(OpcPrefix#BQrr) VR128:$src)>;
5147 def : Pat<(v4i32 (ExtOp (v8i16 VR128:$src))),
5148 (!cast<I>(OpcPrefix#WDrr) VR128:$src)>;
5149 def : Pat<(v2i64 (ExtOp (v8i16 VR128:$src))),
5150 (!cast<I>(OpcPrefix#WQrr) VR128:$src)>;
5152 def : Pat<(v2i64 (ExtOp (v4i32 VR128:$src))),
5153 (!cast<I>(OpcPrefix#DQrr) VR128:$src)>;
5238 (ins VR128:$src1, u8imm:$src2),
5241 [(set GR32orGR64:$dst, (X86pextrb (v16i8 VR128:$src1),
5246 (ins i8mem:$dst, VR128:$src1, u8imm:$src2),
5249 [(store (i8 (trunc (X86pextrb (v16i8 VR128:$src1), timm:$src2))),
5263 (ins VR128:$src1, u8imm:$src2),
5270 (ins i16mem:$dst, VR128:$src1, u8imm:$src2),
5273 [(store (i16 (trunc (X86pextrw (v8i16 VR128:$src1), timm:$src2))),
5283 …(store f16:$src, addr:$dst), (PEXTRWmr addr:$dst, (v8i16 (COPY_TO_REGCLASS FR16:$src, VR128)), 0)>;
5286 …store f16:$src, addr:$dst), (VPEXTRWmr addr:$dst, (v8i16 (COPY_TO_REGCLASS FR16:$src, VR128)), 0)>;
5292 (ins VR128:$src1, u8imm:$src2),
5296 (extractelt (v4i32 VR128:$src1), imm:$src2))]>,
5299 (ins i32mem:$dst, VR128:$src1, u8imm:$src2),
5302 [(store (extractelt (v4i32 VR128:$src1), imm:$src2),
5314 (ins VR128:$src1, u8imm:$src2),
5318 (extractelt (v2i64 VR128:$src1), imm:$src2))]>,
5321 (ins i64mem:$dst, VR128:$src1, u8imm:$src2),
5324 [(store (extractelt (v2i64 VR128:$src1), imm:$src2),
5337 (ins VR128:$src1, u8imm:$src2),
5341 (extractelt (bc_v4i32 (v4f32 VR128:$src1)), imm:$src2))]>,
5344 (ins f32mem:$dst, VR128:$src1, u8imm:$src2),
5347 [(store (extractelt (bc_v4i32 (v4f32 VR128:$src1)), imm:$src2),
5362 def rr : SS4AIi8<opc, MRMSrcReg, (outs VR128:$dst),
5363 (ins VR128:$src1, GR32orGR64:$src2, u8imm:$src3),
5368 [(set VR128:$dst,
5369 (X86pinsrb VR128:$src1, GR32orGR64:$src2, timm:$src3))]>,
5371 def rm : SS4AIi8<opc, MRMSrcMem, (outs VR128:$dst),
5372 (ins VR128:$src1, i8mem:$src2, u8imm:$src3),
5377 [(set VR128:$dst,
5378 (X86pinsrb VR128:$src1, (extloadi8 addr:$src2), timm:$src3))]>,
5384 def : Pat<(X86pinsrb VR128:$src1, (i32 (anyext (i8 GR8:$src2))), timm:$src3),
5385 (VPINSRBrr VR128:$src1, (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
5393 def rr : SS4AIi8<opc, MRMSrcReg, (outs VR128:$dst),
5394 (ins VR128:$src1, GR32:$src2, u8imm:$src3),
5399 [(set VR128:$dst,
5400 (v4i32 (insertelt VR128:$src1, GR32:$src2, imm:$src3)))]>,
5402 def rm : SS4AIi8<opc, MRMSrcMem, (outs VR128:$dst),
5403 (ins VR128:$src1, i32mem:$src2, u8imm:$src3),
5408 [(set VR128:$dst,
5409 (v4i32 (insertelt VR128:$src1, (loadi32 addr:$src2), imm:$src3)))]>,
5419 def rr : SS4AIi8<opc, MRMSrcReg, (outs VR128:$dst),
5420 (ins VR128:$src1, GR64:$src2, u8imm:$src3),
5425 [(set VR128:$dst,
5426 (v2i64 (insertelt VR128:$src1, GR64:$src2, imm:$src3)))]>,
5428 def rm : SS4AIi8<opc, MRMSrcMem, (outs VR128:$dst),
5429 (ins VR128:$src1, i64mem:$src2, u8imm:$src3),
5434 [(set VR128:$dst,
5435 (v2i64 (insertelt VR128:$src1, (loadi64 addr:$src2), imm:$src3)))]>,
5450 def rr : SS4AIi8<opc, MRMSrcReg, (outs VR128:$dst),
5451 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
5456 [(set VR128:$dst,
5457 (X86insertps VR128:$src1, VR128:$src2, timm:$src3))]>,
5459 def rm : SS4AIi8<opc, MRMSrcMem, (outs VR128:$dst),
5460 (ins VR128:$src1, f32mem:$src2, u8imm:$src3),
5465 [(set VR128:$dst,
5466 (X86insertps VR128:$src1,
5584 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
5590 [(set VR128:$dst, (VT32 (OpNode VR128:$src1, VR128:$src2, timm:$src3)))]>,
5594 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2, i32u8imm:$src3),
5600 [(set VR128:$dst,
5601 (OpNode VR128:$src1, (sse_load_f32 addr:$src2), timm:$src3))]>,
5607 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
5613 [(set VR128:$dst, (VT64 (OpNode VR128:$src1, VR128:$src2, timm:$src3)))]>,
5617 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2, i32u8imm:$src3),
5623 [(set VR128:$dst,
5624 (OpNode VR128:$src1, (sse_load_f64 addr:$src2), timm:$src3))]>,
5634 defm VROUNDPS : sse41_fp_unop_p<0x08, "vroundps", f128mem, VR128, v4f32,
5643 defm VROUNDPD : sse41_fp_unop_p<0x09, "vroundpd", f128mem, VR128, v2f64,
5674 defm ROUNDPS : sse41_fp_unop_p<0x08, "roundps", f128mem, VR128, v4f32,
5677 defm ROUNDPD : sse41_fp_unop_p<0x09, "roundpd", f128mem, VR128, v2f64,
5714 def VPTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
5716 [(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
5718 def VPTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
5720 [(set EFLAGS,(X86ptest VR128:$src1, (loadv2i64 addr:$src2)))]>,
5736 def PTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
5738 [(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
5740 def PTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
5742 [(set EFLAGS, (X86ptest VR128:$src1, (memopv2i64 addr:$src2)))]>,
5747 def : Pat<(X86ptest_commutable (loadv2i64 addr:$src2), VR128:$src1),
5748 (VPTESTrm VR128:$src1, addr:$src2)>;
5753 def : Pat<(X86ptest_commutable (memopv2i64 addr:$src2), VR128:$src1),
5754 (PTESTrm VR128:$src1, addr:$src2)>;
5780 defm VTESTPS : avx_bittest<0x0E, "vtestps", VR128, f128mem, loadv4f32, v4f32,
5786 defm VTESTPD : avx_bittest<0x0F, "vtestpd", VR128, f128mem, loadv2f64, v2f64,
5794 def : Pat<(X86testp_commutable (loadv4f32 addr:$src2), VR128:$src),
5795 (VTESTPSrm VR128:$src, addr:$src2)>;
5799 def : Pat<(X86testp_commutable (loadv2f64 addr:$src2), VR128:$src),
5800 (VTESTPDrm VR128:$src, addr:$src2)>;
5827 def rr : SS48I<opc, MRMSrcReg, (outs VR128:$dst),
5828 (ins VR128:$src),
5830 [(set VR128:$dst, (v8i16 (OpNode (v8i16 VR128:$src))))]>,
5832 def rm : SS48I<opc, MRMSrcMem, (outs VR128:$dst),
5835 [(set VR128:$dst,
5874 defm VPMINSD : SS48I_binop_rm<0x39, "vpminsd", smin, v4i32, VR128,
5877 defm VPMINUD : SS48I_binop_rm<0x3B, "vpminud", umin, v4i32, VR128,
5880 defm VPMAXSD : SS48I_binop_rm<0x3D, "vpmaxsd", smax, v4i32, VR128,
5883 defm VPMAXUD : SS48I_binop_rm<0x3F, "vpmaxud", umax, v4i32, VR128,
5886 defm VPMULDQ : SS48I_binop_rm<0x28, "vpmuldq", X86pmuldq, v2i64, VR128,
5891 defm VPMINSB : SS48I_binop_rm<0x38, "vpminsb", smin, v16i8, VR128,
5894 defm VPMINUW : SS48I_binop_rm<0x3A, "vpminuw", umin, v8i16, VR128,
5897 defm VPMAXSB : SS48I_binop_rm<0x3C, "vpmaxsb", smax, v16i8, VR128,
5900 defm VPMAXUW : SS48I_binop_rm<0x3E, "vpmaxuw", umax, v8i16, VR128,
5938 defm PMINSB : SS48I_binop_rm<0x38, "pminsb", smin, v16i8, VR128,
5940 defm PMINSD : SS48I_binop_rm<0x39, "pminsd", smin, v4i32, VR128,
5942 defm PMINUD : SS48I_binop_rm<0x3B, "pminud", umin, v4i32, VR128,
5944 defm PMINUW : SS48I_binop_rm<0x3A, "pminuw", umin, v8i16, VR128,
5946 defm PMAXSB : SS48I_binop_rm<0x3C, "pmaxsb", smax, v16i8, VR128,
5948 defm PMAXSD : SS48I_binop_rm<0x3D, "pmaxsd", smax, v4i32, VR128,
5950 defm PMAXUD : SS48I_binop_rm<0x3F, "pmaxud", umax, v4i32, VR128,
5952 defm PMAXUW : SS48I_binop_rm<0x3E, "pmaxuw", umax, v8i16, VR128,
5954 defm PMULDQ : SS48I_binop_rm<0x28, "pmuldq", X86pmuldq, v2i64, VR128,
5959 defm VPMULLD : SS48I_binop_rm<0x40, "vpmulld", mul, v4i32, VR128,
5963 defm VPCMPEQQ : SS48I_binop_rm<0x29, "vpcmpeqq", X86pcmpeq, v2i64, VR128,
5977 defm PMULLD : SS48I_binop_rm<0x40, "pmulld", mul, v4i32, VR128,
5979 defm PCMPEQQ : SS48I_binop_rm<0x29, "pcmpeqq", X86pcmpeq, v2i64, VR128,
6121 VR128, load, i128mem, 0,
6128 VR128, load, f128mem, 0,
6132 VR128, load, f128mem, 0,
6152 VR128, memop, i128mem, 1,
6158 VR128, memop, f128mem, 1,
6162 VR128, memop, f128mem, 1,
6202 VR128, load, f128mem, 0, SSEPackedSingle,
6210 VR128, load, f128mem, 0, SSEPackedDouble,
6218 VR128, load, i128mem, 0, SSEPackedInt,
6242 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
6243 (VPBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm2 timm:$src3))>;
6244 def : Pat<(X86Blendi VR128:$src1, (loadv2i64 addr:$src2), timm:$src3),
6245 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm2 timm:$src3))>;
6246 def : Pat<(X86Blendi (loadv2i64 addr:$src2), VR128:$src1, timm:$src3),
6247 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2 timm:$src3))>;
6258 def : Pat<(X86Blendi (v4i32 VR128:$src1), (v4i32 VR128:$src2), timm:$src3),
6259 (VPBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm4 timm:$src3))>;
6260 def : Pat<(X86Blendi VR128:$src1, (loadv4i32 addr:$src2), timm:$src3),
6261 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
6262 def : Pat<(X86Blendi (loadv4i32 addr:$src2), VR128:$src1, timm:$src3),
6263 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
6267 VR128, memop, f128mem, 1, SSEPackedSingle,
6270 VR128, memop, f128mem, 1, SSEPackedDouble,
6273 VR128, memop, i128mem, 1, SSEPackedInt,
6279 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
6280 (PBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm2 timm:$src3))>;
6281 def : Pat<(X86Blendi VR128:$src1, (memopv2i64 addr:$src2), timm:$src3),
6282 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm2 timm:$src3))>;
6283 def : Pat<(X86Blendi (memopv2i64 addr:$src2), VR128:$src1, timm:$src3),
6284 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2 timm:$src3))>;
6286 def : Pat<(X86Blendi (v4i32 VR128:$src1), (v4i32 VR128:$src2), timm:$src3),
6287 (PBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm4 timm:$src3))>;
6288 def : Pat<(X86Blendi VR128:$src1, (memopv4i32 addr:$src2), timm:$src3),
6289 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
6290 def : Pat<(X86Blendi (memopv4i32 addr:$src2), VR128:$src1, timm:$src3),
6291 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
6297 def : Pat<(insert_subvector (v4f64 VR256:$src1), (v2f64 VR128:$src2), (iPTR 0)),
6300 VR128:$src2, sub_xmm), 0x3)>;
6301 def : Pat<(insert_subvector (v8f32 VR256:$src1), (v4f32 VR128:$src2), (iPTR 0)),
6304 VR128:$src2, sub_xmm), 0xf)>;
6306 def : Pat<(insert_subvector (loadv4f64 addr:$src2), (v2f64 VR128:$src1), (iPTR 0)),
6308 VR128:$src1, sub_xmm), addr:$src2, 0xc)>;
6309 def : Pat<(insert_subvector (loadv8f32 addr:$src2), (v4f32 VR128:$src1), (iPTR 0)),
6311 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
6344 defm VBLENDVPD : SS41I_quaternary_avx<0x4B, "vblendvpd", VR128, f128mem,
6352 defm VBLENDVPS : SS41I_quaternary_avx<0x4A, "vblendvps", VR128, f128mem,
6359 defm VPBLENDVB : SS41I_quaternary_avx<0x4C, "vpblendvb", VR128, i128mem,
6371 def : Pat<(v4i32 (X86Blendv (v4i32 VR128:$mask), (v4i32 VR128:$src1),
6372 (v4i32 VR128:$src2))),
6373 (VBLENDVPSrrr VR128:$src2, VR128:$src1, VR128:$mask)>;
6374 def : Pat<(v2i64 (X86Blendv (v2i64 VR128:$mask), (v2i64 VR128:$src1),
6375 (v2i64 VR128:$src2))),
6376 (VBLENDVPDrrr VR128:$src2, VR128:$src1, VR128:$mask)>;
6389 def : Pat<(v4f32 (X86vzmovl (v4f32 VR128:$src))),
6390 (VBLENDPSrri (v4f32 (V_SET0)), VR128:$src, (i8 1))>;
6391 def : Pat<(v4i32 (X86vzmovl (v4i32 VR128:$src))),
6392 (VPBLENDWrri (v4i32 (V_SET0)), VR128:$src, (i8 3))>;
6394 def : Pat<(v4f32 (X86Movss VR128:$src1, VR128:$src2)),
6395 (VBLENDPSrri VR128:$src1, VR128:$src2, (i8 1))>;
6396 def : Pat<(v4f32 (X86Movss VR128:$src1, (loadv4f32 addr:$src2))),
6397 (VBLENDPSrmi VR128:$src1, addr:$src2, (i8 1))>;
6398 def : Pat<(v4f32 (X86Movss (loadv4f32 addr:$src2), VR128:$src1)),
6399 (VBLENDPSrmi VR128:$src1, addr:$src2, (i8 0xe))>;
6401 def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
6402 (VBLENDPDrri VR128:$src1, VR128:$src2, (i8 1))>;
6403 def : Pat<(v2f64 (X86Movsd VR128:$src1, (loadv2f64 addr:$src2))),
6404 (VBLENDPDrmi VR128:$src1, addr:$src2, (i8 1))>;
6405 def : Pat<(v2f64 (X86Movsd (loadv2f64 addr:$src2), VR128:$src1)),
6406 (VBLENDPDrmi VR128:$src1, addr:$src2, (i8 2))>;
6426 def : Pat<(v4f32 (X86vzmovl (v4f32 VR128:$src))),
6427 (BLENDPSrri (v4f32 (V_SET0)), VR128:$src, (i8 1))>;
6428 def : Pat<(v4i32 (X86vzmovl (v4i32 VR128:$src))),
6429 (PBLENDWrri (v4i32 (V_SET0)), VR128:$src, (i8 3))>;
6431 def : Pat<(v4f32 (X86Movss VR128:$src1, VR128:$src2)),
6432 (BLENDPSrri VR128:$src1, VR128:$src2, (i8 1))>;
6433 def : Pat<(v4f32 (X86Movss VR128:$src1, (memopv4f32 addr:$src2))),
6434 (BLENDPSrmi VR128:$src1, addr:$src2, (i8 1))>;
6435 def : Pat<(v4f32 (X86Movss (memopv4f32 addr:$src2), VR128:$src1)),
6436 (BLENDPSrmi VR128:$src1, addr:$src2, (i8 0xe))>;
6438 def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
6439 (BLENDPDrri VR128:$src1, VR128:$src2, (i8 1))>;
6440 def : Pat<(v2f64 (X86Movsd VR128:$src1, (memopv2f64 addr:$src2))),
6441 (BLENDPDrmi VR128:$src1, addr:$src2, (i8 1))>;
6442 def : Pat<(v2f64 (X86Movsd (memopv2f64 addr:$src2), VR128:$src1)),
6443 (BLENDPDrmi VR128:$src1, addr:$src2, (i8 2))>;
6452 def rr0 : SS48I<opc, MRMSrcReg, (outs VR128:$dst),
6453 (ins VR128:$src1, VR128:$src2),
6456 [(set VR128:$dst,
6457 (VT (OpNode XMM0, VR128:$src2, VR128:$src1)))]>,
6460 def rm0 : SS48I<opc, MRMSrcMem, (outs VR128:$dst),
6461 (ins VR128:$src1, x86memop:$src2),
6464 [(set VR128:$dst,
6465 (OpNode XMM0, (mem_frag addr:$src2), VR128:$src1))]>,
6481 (BLENDVPDrr0 VR128:$dst, VR128:$src2), 0>;
6483 (BLENDVPDrm0 VR128:$dst, f128mem:$src2), 0>;
6485 (BLENDVPSrr0 VR128:$dst, VR128:$src2), 0>;
6487 (BLENDVPSrm0 VR128:$dst, f128mem:$src2), 0>;
6489 (PBLENDVBrr0 VR128:$dst, VR128:$src2), 0>;
6491 (PBLENDVBrm0 VR128:$dst, i128mem:$src2), 0>;
6494 def : Pat<(v4i32 (X86Blendv (v4i32 XMM0), (v4i32 VR128:$src1),
6495 (v4i32 VR128:$src2))),
6496 (BLENDVPSrr0 VR128:$src2, VR128:$src1)>;
6497 def : Pat<(v2i64 (X86Blendv (v2i64 XMM0), (v2i64 VR128:$src1),
6498 (v2i64 VR128:$src2))),
6499 (BLENDVPDrr0 VR128:$src2, VR128:$src1)>;
6505 def VMOVNTDQArm : SS48I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
6512 def MOVNTDQArm : SS48I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
6596 defm VPCMPGTQ : SS42I_binop_rm<0x37, "vpcmpgtq", X86pcmpgt, v2i64, VR128,
6606 defm PCMPGTQ : SS42I_binop_rm<0x37, "pcmpgtq", X86pcmpgt, v2i64, VR128,
6615 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6620 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6633 (ins VR128:$src1, VR128:$src3, u8imm:$src5),
6638 (ins VR128:$src1, i128mem:$src3, u8imm:$src5),
6651 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6656 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6669 (ins VR128:$src1, VR128:$src3, u8imm:$src5),
6674 (ins VR128:$src1, i128mem:$src3, u8imm:$src5),
6743 def rr : I<Opc, MRMSrcReg, (outs VR128:$dst),
6744 (ins VR128:$src1, VR128:$src2),
6749 (set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0)),
6750 (set VR128:$dst, (IntId VR128:$src1, VR128:$src2)))]>,
6753 def rm : I<Opc, MRMSrcMem, (outs VR128:$dst),
6754 (ins VR128:$src1, i128mem:$src2),
6759 (set VR128:$dst, (IntId VR128:$src1,
6761 (set VR128:$dst, (IntId VR128:$src1,
6767 def SHA1RNDS4rri : Ii8<0xCC, MRMSrcReg, (outs VR128:$dst),
6768 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6770 [(set VR128:$dst,
6771 (int_x86_sha1rnds4 VR128:$src1, VR128:$src2,
6774 def SHA1RNDS4rmi : Ii8<0xCC, MRMSrcMem, (outs VR128:$dst),
6775 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6777 [(set VR128:$dst,
6778 (int_x86_sha1rnds4 VR128:$src1,
6808 bit Is2Addr = 0, RegisterClass RC = VR128,
6864 def VAESIMCrr : AES8I<0xDB, MRMSrcReg, (outs VR128:$dst),
6865 (ins VR128:$src1),
6867 [(set VR128:$dst,
6868 (int_x86_aesni_aesimc VR128:$src1))]>, Sched<[WriteAESIMC]>,
6870 def VAESIMCrm : AES8I<0xDB, MRMSrcMem, (outs VR128:$dst),
6873 [(set VR128:$dst, (int_x86_aesni_aesimc (load addr:$src1)))]>,
6876 def AESIMCrr : AES8I<0xDB, MRMSrcReg, (outs VR128:$dst),
6877 (ins VR128:$src1),
6879 [(set VR128:$dst,
6880 (int_x86_aesni_aesimc VR128:$src1))]>, Sched<[WriteAESIMC]>;
6881 def AESIMCrm : AES8I<0xDB, MRMSrcMem, (outs VR128:$dst),
6884 [(set VR128:$dst, (int_x86_aesni_aesimc (memop addr:$src1)))]>,
6889 def VAESKEYGENASSIST128rr : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
6890 (ins VR128:$src1, u8imm:$src2),
6892 [(set VR128:$dst,
6893 (int_x86_aesni_aeskeygenassist VR128:$src1, timm:$src2))]>,
6895 def VAESKEYGENASSIST128rm : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
6898 [(set VR128:$dst,
6902 def AESKEYGENASSIST128rr : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
6903 (ins VR128:$src1, u8imm:$src2),
6905 [(set VR128:$dst,
6906 (int_x86_aesni_aeskeygenassist VR128:$src1, timm:$src2))]>,
6908 def AESKEYGENASSIST128rm : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
6911 [(set VR128:$dst,
6929 def PCLMULQDQrri : PCLMULIi8<0x44, MRMSrcReg, (outs VR128:$dst),
6930 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6932 [(set VR128:$dst,
6933 (int_x86_pclmulqdq VR128:$src1, VR128:$src2, timm:$src3))]>,
6936 def PCLMULQDQrmi : PCLMULIi8<0x44, MRMSrcMem, (outs VR128:$dst),
6937 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6939 [(set VR128:$dst,
6940 (int_x86_pclmulqdq VR128:$src1, (memop addr:$src2),
6945 def : Pat<(int_x86_pclmulqdq (memop addr:$src2), VR128:$src1,
6947 (PCLMULQDQrmi VR128:$src1, addr:$src2,
6955 (PCLMULQDQrri VR128:$dst, VR128:$src,
6958 (PCLMULQDQrmi VR128:$dst, i128mem:$src,
6988 defm VPCLMULQDQ : vpclmulqdq<VR128, i128mem, load,
7014 defm : vpclmulqdq_aliases<"VPCLMULQDQ", VR128, i128mem>;
7025 def EXTRQI : Ii8<0x78, MRMXr, (outs VR128:$dst),
7026 (ins VR128:$src, u8imm:$len, u8imm:$idx),
7028 [(set VR128:$dst, (X86extrqi VR128:$src, timm:$len,
7031 def EXTRQ : I<0x79, MRMSrcReg, (outs VR128:$dst),
7032 (ins VR128:$src, VR128:$mask),
7034 [(set VR128:$dst, (int_x86_sse4a_extrq VR128:$src,
7035 VR128:$mask))]>,
7038 def INSERTQI : Ii8<0x78, MRMSrcReg, (outs VR128:$dst),
7039 (ins VR128:$src, VR128:$src2, u8imm:$len, u8imm:$idx),
7041 [(set VR128:$dst, (X86insertqi VR128:$src, VR128:$src2,
7044 def INSERTQ : I<0x79, MRMSrcReg, (outs VR128:$dst),
7045 (ins VR128:$src, VR128:$mask),
7047 [(set VR128:$dst, (int_x86_sse4a_insertq VR128:$src,
7048 VR128:$mask))]>,
7056 def MOVNTSS : I<0x2B, MRMDestMem, (outs), (ins f32mem:$dst, VR128:$src),
7059 def MOVNTSD : I<0x2B, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src),
7064 (MOVNTSS addr:$dst, (v4f32 (COPY_TO_REGCLASS FR32:$src, VR128)))>;
7067 (MOVNTSD addr:$dst, (v2f64 (COPY_TO_REGCLASS FR64:$src, VR128)))>;
7093 AVX28I<opc, MRMSrcReg, (outs RC:$dst), (ins VR128:$src),
7095 [(set RC:$dst, (ResVT (X86VBroadcast (OpVT VR128:$src))))]>,
7099 def VBROADCASTSSrm : avx_broadcast_rm<0x18, "vbroadcastss", VR128,
7112 def VBROADCASTSSrr : avx2_broadcast_rr<0x18, "vbroadcastss", VR128,
7211 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
7231 def : Pat<(vinsert128_insert:$ins (To VR256:$src1), (From VR128:$src2),
7233 (!cast<Instruction>(InstrStr#rr) VR256:$src1, VR128:$src2,
7242 (From VR128:$src2),
7245 (INSERT_SUBREG (To (IMPLICIT_DEF)), VR128:$src2, sub_xmm),
7267 def VEXTRACTF128rr : AVXAIi8<0x19, MRMDestReg, (outs VR128:$dst),
7282 (EXTRACT_get_vextract128_imm VR128:$ext)))>;
7286 (EXTRACT_get_vextract128_imm VR128:$ext))>;
7312 def rm : AVX8I<opc_rm, MRMSrcMem, (outs VR128:$dst),
7313 (ins VR128:$src1, f128mem:$src2),
7315 [(set VR128:$dst, (IntLd addr:$src2, VR128:$src1))]>,
7323 (ins f128mem:$dst, VR128:$src1, VR128:$src2),
7325 [(IntSt addr:$dst, VR128:$src1, VR128:$src2)]>,
7357 def rr : AVX8I<opc, MRMSrcReg, (outs VR128:$dst),
7358 (ins VR128:$src1, VR128:$src2, VR128:$src3),
7360 [(set VR128:$dst, (v4i32 (OpNode VR128:$src1,
7361 VR128:$src2, VR128:$src3)))]>,
7364 def rm : AVX8I<opc, MRMSrcMem, (outs VR128:$dst),
7365 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
7367 [(set VR128:$dst, (v4i32 (OpNode VR128:$src1, VR128:$src2,
7403 def : Pat<(v4i32 (add VR128:$src1,
7404 (X86vpmaddwd_su VR128:$src2, VR128:$src3))),
7405 (VPDPWSSDrr VR128:$src1, VR128:$src2, VR128:$src3)>;
7406 def : Pat<(v4i32 (add VR128:$src1,
7407 (X86vpmaddwd_su VR128:$src2, (load addr:$src3)))),
7408 (VPDPWSSDrm VR128:$src1, VR128:$src2, addr:$src3)>;
7449 defm VPERMILPS : avx_permil<0x0C, 0x04, "vpermilps", VR128, f128mem, i128mem,
7457 defm VPERMILPD : avx_permil<0x0D, 0x05, "vpermilpd", VR128, f128mem, i128mem,
7491 def rr : I<0x13, MRMSrcReg, (outs RC:$dst), (ins VR128:$src),
7493 [(set RC:$dst, (X86any_cvtph2ps VR128:$src))]>,
7503 def rr : Ii8<0x1D, MRMDestReg, (outs VR128:$dst),
7506 [(set VR128:$dst, (X86any_cvtps2ph RC:$src1, timm:$src2))]>,
7516 defm VCVTPH2PS : f16c_ph2ps<VR128, f64mem, WriteCvtPH2PS>, SIMD_EXC;
7518 defm VCVTPS2PH : f16c_ps2ph<VR128, f64mem, WriteCvtPS2PH,
7533 (bc_v2f64 (v8i16 (X86any_cvtps2ph VR128:$src1, timm:$src2))),
7535 (VCVTPS2PHmr addr:$dst, VR128:$src1, timm:$src2)>;
7537 (bc_v2i64 (v8i16 (X86any_cvtps2ph VR128:$src1, timm:$src2))),
7539 (VCVTPS2PHmr addr:$dst, VR128:$src1, timm:$src2)>;
7576 SchedWriteBlend.XMM, VR128, i128mem,
7589 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
7590 (VPBLENDDrri VR128:$src1, VR128:$src2, (BlendScaleImm2to4 timm:$src3))>;
7591 def : Pat<(X86Blendi VR128:$src1, (loadv2i64 addr:$src2), timm:$src3),
7592 (VPBLENDDrmi VR128:$src1, addr:$src2, (BlendScaleImm2to4 timm:$src3))>;
7593 def : Pat<(X86Blendi (loadv2i64 addr:$src2), VR128:$src1, timm:$src3),
7594 (VPBLENDDrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2to4 timm:$src3))>;
7602 def : Pat<(insert_subvector (v8i32 VR256:$src1), (v4i32 VR128:$src2), (iPTR 0)),
7605 VR128:$src2, sub_xmm), 0xf)>;
7606 def : Pat<(insert_subvector (v4i64 VR256:$src1), (v2i64 VR128:$src2), (iPTR 0)),
7609 VR128:$src2, sub_xmm), 0xf)>;
7610 def : Pat<(insert_subvector (v16i16 VR256:$src1), (v8i16 VR128:$src2), (iPTR 0)),
7613 VR128:$src2, sub_xmm), 0xf)>;
7614 def : Pat<(insert_subvector (v16f16 VR256:$src1), (v8f16 VR128:$src2), (iPTR 0)),
7617 VR128:$src2, sub_xmm), 0xf)>;
7618 def : Pat<(insert_subvector (v32i8 VR256:$src1), (v16i8 VR128:$src2), (iPTR 0)),
7621 VR128:$src2, sub_xmm), 0xf)>;
7623 def : Pat<(insert_subvector (loadv8i32 addr:$src2), (v4i32 VR128:$src1), (iPTR 0)),
7625 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7626 def : Pat<(insert_subvector (loadv4i64 addr:$src2), (v2i64 VR128:$src1), (iPTR 0)),
7628 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7629 def : Pat<(insert_subvector (loadv16i16 addr:$src2), (v8i16 VR128:$src1), (iPTR 0)),
7631 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7632 def : Pat<(insert_subvector (loadv16f16 addr:$src2), (v8f16 VR128:$src1), (iPTR 0)),
7634 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7635 def : Pat<(insert_subvector (loadv32i8 addr:$src2), (v16i8 VR128:$src1), (iPTR 0)),
7637 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7648 def rr : AVX28I<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
7650 [(set VR128:$dst,
7651 (OpVT128 (X86VBroadcast (OpVT128 VR128:$src))))]>,
7653 def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst), (ins x86memop:$src),
7655 [(set VR128:$dst,
7658 def Yrr : AVX28I<opc, MRMSrcReg, (outs VR256:$dst), (ins VR128:$src),
7661 (OpVT256 (X86VBroadcast (OpVT128 VR128:$src))))]>,
7690 (VBROADCASTSSrr (v4f32 (COPY_TO_REGCLASS FR32:$src, VR128)))>;
7692 (VBROADCASTSSYrr (v4f32 (COPY_TO_REGCLASS FR32:$src, VR128)))>;
7694 (VBROADCASTSDYrr (v2f64 (COPY_TO_REGCLASS FR64:$src, VR128)))>;
7721 def : Pat<(v8f16 (X86VBroadcast (v8f16 VR128:$src))),
7722 (VPBROADCASTWrr VR128:$src)>;
7723 def : Pat<(v16f16 (X86VBroadcast (v8f16 VR128:$src))),
7724 (VPBROADCASTWYrr VR128:$src)>;
7727 (VPBROADCASTWrr (COPY_TO_REGCLASS FR16:$src, VR128))>;
7729 (VPBROADCASTWYrr (COPY_TO_REGCLASS FR16:$src, VR128))>;
7757 (VMOVDDUPrr (v2f64 (COPY_TO_REGCLASS FR64:$src, VR128)))>;
7762 (VMOVDDUPrr VR128:$src)>;
7767 (VPERMILPSri (v4f32 (COPY_TO_REGCLASS FR32:$src, VR128)), 0)>;
7770 (v4f32 (VPERMILPSri (v4f32 (COPY_TO_REGCLASS FR32:$src, VR128)), 0)), sub_xmm),
7771 (v4f32 (VPERMILPSri (v4f32 (COPY_TO_REGCLASS FR32:$src, VR128)), 0)), 1)>;
7774 (v4f32 (VPERMILPSri VR128:$src, 0)), sub_xmm),
7775 (v4f32 (VPERMILPSri VR128:$src, 0)), 1)>;
7778 (v2f64 (VMOVDDUPrr (v2f64 (COPY_TO_REGCLASS FR64:$src, VR128)))), sub_xmm),
7779 (v2f64 (VMOVDDUPrr (v2f64 (COPY_TO_REGCLASS FR64:$src, VR128)))), 1)>;
7782 (v2f64 (VMOVDDUPrr VR128:$src)), sub_xmm),
7783 (v2f64 (VMOVDDUPrr VR128:$src)), 1)>;
7887 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
7912 def VEXTRACTI128rr : AVX2AIi8<0x39, MRMDestReg, (outs VR128:$dst),
7942 def rm : AVX28I<0x8c, MRMSrcMem, (outs VR128:$dst),
7943 (ins VR128:$src1, i128mem:$src2),
7945 [(set VR128:$dst, (IntLd128 addr:$src2, VR128:$src1))]>,
7953 (ins i128mem:$dst, VR128:$src1, VR128:$src2),
7955 [(IntSt128 addr:$dst, VR128:$src1, VR128:$src2)]>,
7990 defm : maskmov_lowering<"VMASKMOVPS", VR128, v4f32, v4i32>;
7991 defm : maskmov_lowering<"VMASKMOVPD", VR128, v2f64, v2i64>;
7999 defm : maskmov_lowering<"VMASKMOVPS", VR128, v4i32, v4i32>;
8000 defm : maskmov_lowering<"VMASKMOVPD", VR128, v2i64, v2i64>;
8005 defm : maskmov_lowering<"VPMASKMOVD", VR128, v4i32, v4i32>;
8006 defm : maskmov_lowering<"VPMASKMOVQ", VR128, v2i64, v2i64>;
8014 def rr : AVX28I<opc, MRMSrcReg, (outs VR128:$dst),
8015 (ins VR128:$src1, VR128:$src2),
8017 [(set VR128:$dst,
8018 (vt128 (OpNode VR128:$src1, (vt128 VR128:$src2))))]>,
8020 def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst),
8021 (ins VR128:$src1, i128mem:$src2),
8023 [(set VR128:$dst,
8024 (vt128 (OpNode VR128:$src1,
8059 def rm : AVX28I<opc, MRMSrcMem4VOp3, (outs VR128:$dst, VR128:$mask_wb),
8060 (ins VR128:$src1, memop128:$src2, VR128:$mask),
8083 VR128, vx64mem, vy128mem>;
8096 VR128, vx64mem, vy128mem>;
8149 VR128, load, i128mem, SchedWriteVecIMul.XMM, 1>;
8151 defm V#NAME : GF2P8AFFINE_rmi<Op, "v"#OpStr, v16i8, OpNode, VR128,
8163 defm GF2P8MULB : GF2P8MULB_rm<"gf2p8mulb", v16i8, VR128, memop,
8166 defm VGF2P8MULB : GF2P8MULB_rm<"vgf2p8mulb", v16i8, VR128, load,
8185 def rr : AVX8I<opc, MRMSrcReg, (outs VR128:$dst),
8186 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8188 [(set VR128:$dst, (v2i64 (OpNode VR128:$src2,
8189 VR128:$src3, VR128:$src1)))]>,
8192 def rm : AVX8I<opc, MRMSrcMem, (outs VR128:$dst),
8193 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8195 [(set VR128:$dst, (v2i64 (OpNode VR128:$src2,
8196 (loadv2i64 addr:$src3), VR128:$src1)))]>,
8239 defm VPDPBSSD : avx_dotprod_rm<0x50,"vpdpbssd", v4i32, VR128, loadv4i32,
8245 defm VPDPBUUD : avx_dotprod_rm<0x50,"vpdpbuud", v4i32, VR128, loadv4i32,
8251 defm VPDPBSSDS : avx_dotprod_rm<0x51,"vpdpbssds", v4i32, VR128, loadv4i32,
8257 defm VPDPBUUDS : avx_dotprod_rm<0x51,"vpdpbuuds", v4i32, VR128, loadv4i32,
8263 defm VPDPBSUD : avx_dotprod_rm<0x50,"vpdpbsud", v4i32, VR128, loadv4i32,
8269 defm VPDPBSUDS : avx_dotprod_rm<0x51,"vpdpbsuds", v4i32, VR128, loadv4i32,
8280 def rm : I<Opcode, MRMSrcMem, (outs VR128:$dst), (ins MemOp128:$src),
8282 [(set VR128:$dst,
8293 def rr : I<0x72, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
8295 [(set VR128:$dst, (int_x86_vcvtneps2bf16128 VR128:$src))]>,
8297 def rm : I<0x72, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
8299 [(set VR128:$dst, (int_x86_vcvtneps2bf16128 (loadv4f32 addr:$src)))]>,
8301 def Yrr : I<0x72, MRMSrcReg, (outs VR128:$dst), (ins VR256:$src),
8303 [(set VR128:$dst, (int_x86_vcvtneps2bf16256 VR256:$src))]>,
8305 def Yrm : I<0x72, MRMSrcMem, (outs VR128:$dst), (ins f256mem:$src),
8307 [(set VR128:$dst, (int_x86_vcvtneps2bf16256 (loadv8f32 addr:$src)))]>,
8326 def : Pat<(v8bf16 (X86cvtneps2bf16 (v4f32 VR128:$src))),
8327 (VCVTNEPS2BF16rr VR128:$src)>;
8337 (VCVTNEPS2BF16rr VR128:$dst, VR128:$src), 0, "att">;
8339 (VCVTNEPS2BF16Yrr VR128:$dst, VR256:$src), 0, "att">;
8344 (ins VR256:$src1, VR128:$src2),
8347 (int_x86_vsha512msg1 VR256:$src1, VR128:$src2))]>, VEX_L,
8356 (ins VR256:$src1, VR256:$src2, VR128:$src3),
8359 (int_x86_vsha512rnds2 VR256:$src1, VR256:$src2, VR128:$src3))]>,
8366 def rr : I<0xda, MRMSrcReg, (outs VR128:$dst),
8367 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8369 [(set VR128:$dst,
8370 (!cast<Intrinsic>("int_x86_"#OpStr) VR128:$src1,
8371 VR128:$src2, VR128:$src3))]>,
8373 def rm : I<0xda, MRMSrcMem, (outs VR128:$dst),
8374 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8376 [(set VR128:$dst,
8377 (!cast<Intrinsic>("int_x86_"#OpStr) VR128:$src1,
8378 VR128:$src2, (loadv4i32 addr:$src3)))]>,
8383 def rr : Ii8<0xde, MRMSrcReg, (outs VR128:$dst),
8384 (ins VR128:$src1, VR128:$src2, VR128:$src3, i32u8imm:$src4),
8386 [(set VR128:$dst,
8387 (int_x86_vsm3rnds2 VR128:$src1,
8388 VR128:$src2, VR128:$src3, timm:$src4))]>,
8390 def rm : Ii8<0xde, MRMSrcMem, (outs VR128:$dst),
8391 (ins VR128:$src1, VR128:$src2, i128mem:$src3, i32u8imm:$src4),
8393 [(set VR128:$dst,
8394 (int_x86_vsm3rnds2 VR128:$src1,
8395 VR128:$src2, (loadv4i32 addr:$src3), timm:$src4))]>,
8423 defm VSM4KEY4 : SM4_Base<"vsm4key4", VR128, "128", loadv4i32, i128mem>, T8, XS, VEX, VVVV;
8425 defm VSM4RNDS4 : SM4_Base<"vsm4rnds4", VR128, "128", loadv4i32, i128mem>, T8, XD, VEX, VVVV;
8431 def rr : I<opc, MRMSrcReg, (outs VR128:$dst),
8432 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8434 [(set VR128:$dst,
8436 VR128:$src1, VR128:$src2, VR128:$src3)))]>,
8439 def rm : I<opc, MRMSrcMem, (outs VR128:$dst),
8440 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8442 [(set VR128:$dst,
8444 VR128:$src1, VR128:$src2, (loadv4i32 addr:$src3))))]>,