Lines Matching refs:VEX
218 VEX, VVVV, VEX_LIG, WIG;
223 VEX, VEX_LIG, Sched<[WriteFStore]>, WIG;
251 VEX, VEX_LIG, Sched<[WriteFLoad]>, WIG;
262 VEX, VEX_LIG, Sched<[WriteFLoad]>, WIG;
355 TB, VEX, WIG;
358 TB, PD, VEX, WIG;
361 TB, VEX, WIG;
364 TB, PD, VEX, WIG;
368 TB, VEX, VEX_L, WIG;
371 TB, PD, VEX, VEX_L, WIG;
374 TB, VEX, VEX_L, WIG;
377 TB, PD, VEX, VEX_L, WIG;
402 VEX, WIG;
406 VEX, WIG;
410 VEX, WIG;
414 VEX, WIG;
421 VEX, VEX_L, WIG;
425 VEX, VEX_L, WIG;
429 VEX, VEX_L, WIG;
433 VEX, VEX_L, WIG;
444 VEX, WIG;
448 VEX, WIG;
452 VEX, WIG;
456 VEX, WIG;
463 VEX, VEX_L, WIG;
467 VEX, VEX_L, WIG;
471 VEX, VEX_L, WIG;
475 VEX, VEX_L, WIG;
686 VEX, VVVV, WIG;
701 VEX, WIG;
706 VEX, WIG;
747 []>, VEX, WIG;
752 (iPTR 0))), addr:$dst)]>, VEX, WIG;
826 VEX, VVVV, Sched<[SchedWriteFShuffle.XMM]>, WIG;
833 VEX, VVVV, Sched<[SchedWriteFShuffle.XMM]>, WIG;
906 TB, XS, VEX, VEX_LIG;
910 TB, XS, VEX, REX_W, VEX_LIG;
914 TB, XD, VEX, VEX_LIG;
918 TB, XD, VEX, REX_W, VEX_LIG;
923 TB, XS, VEX, VEX_LIG;
927 TB, XS, VEX, REX_W, VEX_LIG;
931 TB, XD, VEX, VEX_LIG;
935 TB, XD, VEX, REX_W, VEX_LIG;
944 WriteCvtI2SS, SSEPackedSingle>, TB, XS, VEX, VVVV,
947 WriteCvtI2SS, SSEPackedSingle>, TB, XS, VEX, VVVV,
950 WriteCvtI2SD, SSEPackedDouble>, TB, XD, VEX, VVVV,
953 WriteCvtI2SD, SSEPackedDouble>, TB, XD, VEX, VVVV,
1077 WriteCvtSD2I, SSEPackedDouble>, TB, XD, VEX, VEX_LIG;
1080 WriteCvtSD2I, SSEPackedDouble>, TB, XD, VEX, REX_W, VEX_LIG;
1093 TB, XS, VEX, VVVV, VEX_LIG, SIMD_EXC;
1096 TB, XS, VEX, VVVV, VEX_LIG, REX_W, SIMD_EXC;
1099 TB, XD, VEX, VVVV, VEX_LIG;
1102 TB, XD, VEX, VVVV, VEX_LIG, REX_W, SIMD_EXC;
1153 WriteCvtSS2I, SSEPackedSingle>, TB, XS, VEX, VEX_LIG;
1157 TB, XS, VEX, VEX_LIG, REX_W;
1160 WriteCvtSS2I, SSEPackedDouble>, TB, XD, VEX, VEX_LIG;
1164 TB, XD, VEX, VEX_LIG, REX_W;
1220 WriteCvtSS2I, SSEPackedSingle>, TB, XS, VEX, VEX_LIG;
1223 WriteCvtSS2I, SSEPackedSingle>, TB, XS, VEX, REX_W, VEX_LIG;
1236 TB, VEX, Requires<[HasAVX, NoVLX]>, WIG;
1240 TB, VEX, VEX_L, Requires<[HasAVX, NoVLX]>, WIG;
1292 VEX, VVVV, VEX_LIG, WIG,
1298 TB, XD, VEX, VVVV, VEX_LIG, WIG,
1324 TB, XD, VEX, VVVV, VEX_LIG, WIG, Requires<[UseAVX]>,
1331 TB, XD, VEX, VVVV, VEX_LIG, WIG, Requires<[UseAVX]>,
1356 TB, XS, VEX, VVVV, VEX_LIG, WIG,
1362 TB, XS, VEX, VVVV, VEX_LIG, WIG,
1389 []>, TB, XS, VEX, VVVV, VEX_LIG, WIG,
1395 []>, TB, XS, VEX, VVVV, VEX_LIG, WIG, Requires<[HasAVX]>,
1530 VEX, Sched<[WriteCvtPS2I]>, WIG, SIMD_EXC;
1535 VEX, Sched<[WriteCvtPS2ILd]>, WIG, SIMD_EXC;
1540 VEX, VEX_L, Sched<[WriteCvtPS2IY]>, WIG, SIMD_EXC;
1545 VEX, VEX_L, Sched<[WriteCvtPS2IYLd]>, WIG, SIMD_EXC;
1566 VEX, Sched<[WriteCvtPD2I]>, WIG;
1572 (v4i32 (X86cvtp2Int (loadv2f64 addr:$src))))]>, VEX,
1580 VEX, VEX_L, Sched<[WriteCvtPD2IY]>, WIG;
1585 VEX, VEX_L, Sched<[WriteCvtPD2IYLd]>, WIG;
1626 VEX, Sched<[WriteCvtPS2I]>, WIG;
1631 VEX, Sched<[WriteCvtPS2ILd]>, WIG;
1636 VEX, VEX_L, Sched<[WriteCvtPS2IY]>, WIG;
1641 VEX, VEX_L,
1666 VEX, Sched<[WriteCvtPD2I]>, WIG;
1671 VEX, Sched<[WriteCvtPD2ILd]>, WIG;
1678 VEX, VEX_L, Sched<[WriteCvtPD2IY]>, WIG;
1683 VEX, VEX_L, Sched<[WriteCvtPD2IYLd]>, WIG;
1715 TB, VEX, Sched<[WriteCvtPS2PD]>, WIG;
1719 TB, VEX, Sched<[WriteCvtPS2PD.Folded]>, WIG;
1723 TB, VEX, VEX_L, Sched<[WriteCvtPS2PDY]>, WIG;
1727 TB, VEX, VEX_L, Sched<[WriteCvtPS2PDY.Folded]>, WIG;
1751 VEX, Sched<[WriteCvtI2PDLd]>, WIG;
1756 VEX, Sched<[WriteCvtI2PD]>, WIG;
1761 VEX, VEX_L, Sched<[WriteCvtI2PDYLd]>,
1767 VEX, VEX_L, Sched<[WriteCvtI2PDY]>, WIG;
1806 VEX, Sched<[WriteCvtPD2PS]>, WIG;
1810 VEX, Sched<[WriteCvtPD2PS.Folded]>, WIG;
1815 VEX, VEX_L, Sched<[WriteCvtPD2PSY]>, WIG;
1819 VEX, VEX_L, Sched<[WriteCvtPD2PSY.Folded]>, WIG;
1876 TB, XS, VEX, VVVV, VEX_LIG, WIG;
1881 TB, XD, VEX, VVVV, VEX_LIG, WIG;
1935 "ucomiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1937 "ucomisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1939 "comiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1941 "comisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1945 sse_load_f32, "ucomiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1947 sse_load_f64, "ucomisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1950 sse_load_f32, "comiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1952 sse_load_f64, "comisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1995 SchedWriteFCmpSizes.PS.XMM, SSEPackedSingle, loadv4f32>, TB, VEX, VVVV, WIG;
1998 SchedWriteFCmpSizes.PD.XMM, SSEPackedDouble, loadv2f64>, TB, PD, VEX, VVVV, WIG;
2001 SchedWriteFCmpSizes.PS.YMM, SSEPackedSingle, loadv8f32>, TB, VEX, VVVV, VEX_L, WIG;
2004 … SchedWriteFCmpSizes.PD.YMM, SSEPackedDouble, loadv4f64>, TB, PD, VEX, VVVV, VEX_L, WIG;
2092 TB, VEX, VVVV, WIG;
2096 TB, VEX, VVVV, VEX_L, WIG;
2100 TB, PD, VEX, VVVV, WIG;
2104 TB, PD, VEX, VVVV, VEX_L, WIG;
2142 SchedWriteFShuffle.XMM, SSEPackedSingle>, TB, VEX, VVVV, WIG;
2145 SchedWriteFShuffle.XMM, SSEPackedDouble, 1>, TB, PD, VEX, VVVV, WIG;
2148 SchedWriteFShuffle.XMM, SSEPackedSingle>, TB, VEX, VVVV, WIG;
2151 SchedWriteFShuffle.XMM, SSEPackedDouble>, TB, PD, VEX, VVVV, WIG;
2155 SchedWriteFShuffle.YMM, SSEPackedSingle>, TB, VEX, VVVV, VEX_L, WIG;
2158 SchedWriteFShuffle.YMM, SSEPackedDouble>, TB, PD, VEX, VVVV, VEX_L, WIG;
2161 SchedWriteFShuffle.YMM, SSEPackedSingle>, TB, VEX, VVVV, VEX_L, WIG;
2164 SchedWriteFShuffle.YMM, SSEPackedDouble>, TB, PD, VEX, VVVV, VEX_L, WIG;
2224 SSEPackedSingle>, TB, VEX, WIG;
2226 SSEPackedDouble>, TB, PD, VEX, WIG;
2228 SSEPackedSingle>, TB, VEX, VEX_L, WIG;
2230 SSEPackedDouble>, TB, PD, VEX, VEX_L, WIG;
2292 IsCommutable, 0>, VEX, VVVV, WIG;
2301 IsCommutable, 0>, VEX, VVVV, VEX_L, WIG;
2328 [], [], 0>, TB, VEX, VVVV, VEX_L, WIG;
2332 [], [], 0>, TB, PD, VEX, VVVV, VEX_L, WIG;
2336 [], [], 0>, TB, VEX, VVVV, WIG;
2340 [], [], 0>, TB, PD, VEX, VVVV, WIG;
2652 SSEPackedSingle, sched.PS.XMM, 0>, TB, VEX, VVVV, WIG;
2655 SSEPackedDouble, sched.PD.XMM, 0>, TB, PD, VEX, VVVV, WIG;
2659 SSEPackedSingle, sched.PS.YMM, 0>, TB, VEX, VVVV, VEX_L, WIG;
2662 SSEPackedDouble, sched.PD.YMM, 0>, TB, PD, VEX, VVVV, VEX_L, WIG;
2681 TB, XS, VEX, VVVV, VEX_LIG, WIG;
2684 TB, XD, VEX, VVVV, VEX_LIG, WIG;
2703 SSEPackedSingle, sched.PS.Scl, 0>, TB, XS, VEX, VVVV, VEX_LIG, WIG;
2706 SSEPackedDouble, sched.PD.Scl, 0>, TB, XD, VEX, VVVV, VEX_LIG, WIG;
2965 VEX, Sched<[sched.XMM]>, WIG;
2970 VEX, Sched<[sched.XMM.Folded]>, WIG;
2975 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
2980 VEX, VEX_L, Sched<[sched.YMM.Folded]>, WIG;
3001 VEX, Sched<[sched.XMM]>, WIG;
3006 VEX, Sched<[sched.XMM.Folded]>, WIG;
3011 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
3016 VEX, VEX_L, Sched<[sched.YMM.Folded]>, WIG;
3036 TB, XS, VEX, VVVV, VEX_LIG, WIG;
3045 TB, XS, VEX, VVVV, VEX_LIG, WIG;
3054 TB, XD, VEX, VVVV, VEX_LIG, WIG;
3125 addr:$dst)]>, VEX, WIG;
3130 addr:$dst)]>, VEX, WIG;
3138 addr:$dst)]>, VEX, VEX_L, WIG;
3143 addr:$dst)]>, VEX, VEX_L, WIG;
3151 addr:$dst)]>, VEX, WIG,
3157 addr:$dst)]>, VEX, VEX_L, WIG,
3273 VEX, Sched<[WriteLDMXCSR]>, WIG;
3277 VEX, Sched<[WriteSTMXCSR]>, WIG;
3297 Sched<[SchedWriteVecMoveLS.XMM.RR]>, VEX, WIG;
3300 Sched<[SchedWriteVecMoveLS.XMM.RR]>, VEX, WIG;
3303 Sched<[SchedWriteVecMoveLS.YMM.RR]>, VEX, VEX_L, WIG;
3306 Sched<[SchedWriteVecMoveLS.YMM.RR]>, VEX, VEX_L, WIG;
3314 VEX, WIG;
3318 VEX, VEX_L, WIG;
3322 VEX, WIG;
3326 VEX, VEX_L, WIG;
3334 Sched<[SchedWriteVecMoveLS.XMM.RM]>, VEX, WIG;
3338 VEX, VEX_L, WIG;
3343 TB, XS, VEX, WIG;
3347 TB, XS, VEX, VEX_L, WIG;
3355 Sched<[SchedWriteVecMoveLS.XMM.MR]>, VEX, WIG;
3359 Sched<[SchedWriteVecMoveLS.YMM.MR]>, VEX, VEX_L, WIG;
3363 Sched<[SchedWriteVecMoveLS.XMM.MR]>, TB, XS, VEX, WIG;
3366 Sched<[SchedWriteVecMoveLS.YMM.MR]>, TB, XS, VEX, VEX_L, WIG;
3553 VEX, VVVV, WIG;
3558 0>, VEX, VVVV, VEX_L, WIG;
3566 VEX, VVVV, WIG;
3570 VEX, VVVV, VEX_L, WIG;
3620 DstVT128, SrcVT, load, 0>, VEX, VVVV, WIG;
3624 DstVT256, SrcVT, load, 0>, VEX, VVVV, VEX_L,
3647 VR128, v16i8, sched.XMM, 0>, VEX, VVVV, WIG;
3651 VEX, VVVV, VEX_L, WIG;
3723 VEX, Sched<[sched.XMM]>, WIG;
3730 (i8 timm:$src2))))]>, VEX,
3741 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
3748 (i8 timm:$src2))))]>, VEX, VEX_L,
3837 VEX, VVVV, WIG;
3840 VEX, VVVV, WIG;
3844 VEX, VVVV, WIG;
3847 VEX, VVVV, WIG;
3853 VEX, VVVV, VEX_L, WIG;
3856 VEX, VVVV, VEX_L, WIG;
3860 VEX, VVVV, VEX_L, WIG;
3863 VEX, VVVV, VEX_L, WIG;
3908 VEX, VVVV, WIG;
3911 VEX, VVVV, WIG;
3914 VEX, VVVV, WIG;
3917 VEX, VVVV, WIG;
3923 VEX, VVVV, WIG;
3926 VEX, VVVV, WIG;
3929 VEX, VVVV, WIG;
3932 VEX, VVVV, WIG;
3938 VEX, VVVV, VEX_L, WIG;
3941 VEX, VVVV, VEX_L, WIG;
3944 VEX, VVVV, VEX_L, WIG;
3947 VEX, VVVV, VEX_L, WIG;
3953 VEX, VVVV, VEX_L, WIG;
3956 VEX, VVVV, VEX_L, WIG;
3959 VEX, VVVV, VEX_L, WIG;
3962 VEX, VVVV, VEX_L, WIG;
4020 TB, PD, VEX, WIG, Sched<[WriteVecExtract]>;
4030 defm VPINSRW : sse2_pinsrw<0>, TB, PD, VEX, VVVV, WIG;
4061 Sched<[WriteVecMOVMSK]>, VEX, WIG;
4068 Sched<[WriteVecMOVMSKY]>, VEX, VEX_L, WIG;
4083 // As VEX does not have separate instruction contexts for address size
4091 VEX, WIG;
4097 VEX, WIG;
4122 VEX, Sched<[WriteVecMoveFromGpr]>;
4127 VEX, Sched<[WriteVecLoad]>;
4132 VEX, Sched<[WriteVecMoveFromGpr]>;
4136 VEX, Sched<[WriteVecLoad]>;
4141 VEX, Sched<[WriteVecMoveFromGpr]>;
4176 VEX, Sched<[WriteVecMoveFromGpr]>;
4192 (iPTR 0)))]>, VEX,
4199 VEX, Sched<[WriteVecStore]>;
4221 VEX;
4233 VEX, Sched<[WriteVecStore]>;
4247 VEX, Sched<[WriteVecMoveToGpr]>;
4262 VEX, Sched<[WriteVecMoveToGpr]>;
4323 VEX, Requires<[UseAVX]>, WIG;
4339 VEX, WIG;
4350 "movq\t{$src, $dst|$dst, $src}", []>, VEX, WIG;
4385 TB, XS, VEX, Requires<[UseAVX]>, WIG;
4434 SchedWriteFShuffle.XMM>, VEX, WIG;
4437 SchedWriteFShuffle.XMM>, VEX, WIG;
4440 SchedWriteFShuffle.YMM>, VEX, VEX_L, WIG;
4443 SchedWriteFShuffle.YMM>, VEX, VEX_L, WIG;
4512 VEX, WIG;
4514 VEX, VEX_L, WIG;
4538 Sched<[SchedWriteVecMoveLS.XMM.RM]>, VEX, WIG;
4542 Sched<[SchedWriteVecMoveLS.YMM.RM]>, VEX, VEX_L, WIG;
4579 TB, XD, VEX, VVVV, WIG;
4582 TB, XD, VEX, VVVV, VEX_L, WIG;
4587 TB, PD, VEX, VVVV, WIG;
4590 TB, PD, VEX, VVVV, VEX_L, WIG;
4651 X86fhadd, WriteFHAdd, loadv4f32, 0>, VEX, VVVV, WIG;
4653 X86fhsub, WriteFHAdd, loadv4f32, 0>, VEX, VVVV, WIG;
4655 X86fhadd, WriteFHAddY, loadv8f32, 0>, VEX, VVVV, VEX_L, WIG;
4657 X86fhsub, WriteFHAddY, loadv8f32, 0>, VEX, VVVV, VEX_L, WIG;
4661 X86fhadd, WriteFHAdd, loadv2f64, 0>, VEX, VVVV, WIG;
4663 X86fhsub, WriteFHAdd, loadv2f64, 0>, VEX, VVVV, WIG;
4665 X86fhadd, WriteFHAddY, loadv4f64, 0>, VEX, VVVV, VEX_L, WIG;
4667 X86fhsub, WriteFHAddY, loadv4f64, 0>, VEX, VVVV, VEX_L, WIG;
4726 load>, VEX, WIG;
4728 load>, VEX, WIG;
4732 load>, VEX, WIG;
4736 VEX, VEX_L, WIG;
4738 VEX, VEX_L, WIG;
4742 VEX, VEX_L, WIG;
4822 SchedWriteVarShuffle.XMM, 0>, VEX, VVVV, WIG;
4825 SchedWriteVecIMul.XMM, 0>, VEX, VVVV, WIG;
4829 SchedWriteVecIMul.XMM, 0>, VEX, VVVV, WIG;
4836 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4839 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4842 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4845 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4848 SchedWriteVecALU.XMM, load, 0>, VEX, VVVV, WIG;
4851 SchedWriteVecALU.XMM, load, 0>, VEX, VVVV, WIG;
4854 SchedWriteVecALU.XMM, load, 0>, VEX, VVVV, WIG;
4857 SchedWritePHAdd.XMM, load, 0>, VEX, VVVV, WIG;
4860 SchedWritePHAdd.XMM, load, 0>, VEX, VVVV, WIG;
4868 SchedWriteVarShuffle.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4871 SchedWriteVecIMul.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4875 SchedWriteVecIMul.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4882 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4885 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4888 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4891 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4893 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4895 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4897 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4900 SchedWritePHAdd.YMM>, VEX, VVVV, VEX_L, WIG;
4903 SchedWritePHAdd.YMM>, VEX, VVVV, VEX_L, WIG;
4972 SchedWriteShuffle.XMM, 0>, VEX, VVVV, WIG;
4975 SchedWriteShuffle.YMM, 0>, VEX, VVVV, VEX_L, WIG;
5030 VEX, WIG;
5034 VEX, VEX_L, WIG;
5254 defm VPEXTRB : SS41I_extract8<0x14, "vpextrb">, VEX, WIG;
5278 defm VPEXTRW : SS41I_extract16<0x15, "vpextrw">, VEX, WIG;
5307 defm VPEXTRD : SS41I_extract32<0x16, "vpextrd">, VEX;
5329 defm VPEXTRQ : SS41I_extract64<0x16, "vpextrq">, VEX, REX_W;
5353 defm VEXTRACTPS : SS41I_extractf32<0x17, "vextractps">, VEX, WIG;
5383 defm VPINSRB : SS41I_insert8<0x20, "vpinsrb", 0>, VEX, VVVV, WIG;
5414 defm VPINSRD : SS41I_insert32<0x22, "vpinsrd", 0>, VEX, VVVV;
5440 defm VPINSRQ : SS41I_insert64<0x22, "vpinsrq", 0>, VEX, VVVV, REX_W;
5475 VEX, VVVV, WIG;
5636 VEX, WIG;
5639 VEX, VEX_L, WIG;
5645 VEX, WIG;
5648 VEX, VEX_L, WIG;
5654 VEX, VVVV, VEX_LIG, WIG, SIMD_EXC;
5656 VEX, VVVV, VEX_LIG, WIG, SIMD_EXC;
5717 Sched<[SchedWriteVecTest.XMM]>, VEX, WIG;
5722 VEX, WIG;
5727 Sched<[SchedWriteVecTest.YMM]>, VEX, VEX_L, WIG;
5732 VEX, VEX_L, WIG;
5764 Sched<[sched]>, VEX;
5768 Sched<[sched.Folded, sched.ReadAfterFold]>, VEX;
5845 WritePHMINPOS>, VEX, WIG;
5876 VEX, VVVV, WIG;
5879 VEX, VVVV, WIG;
5882 VEX, VVVV, WIG;
5885 VEX, VVVV, WIG;
5888 VEX, VVVV, WIG;
5893 VEX, VVVV, WIG;
5896 VEX, VVVV, WIG;
5899 VEX, VVVV, WIG;
5902 VEX, VVVV, WIG;
5908 VEX, VVVV, VEX_L, WIG;
5911 VEX, VVVV, VEX_L, WIG;
5914 VEX, VVVV, VEX_L, WIG;
5917 VEX, VVVV, VEX_L, WIG;
5920 VEX, VVVV, VEX_L, WIG;
5925 VEX, VVVV, VEX_L, WIG;
5928 VEX, VVVV, VEX_L, WIG;
5931 VEX, VVVV, VEX_L, WIG;
5934 VEX, VVVV, VEX_L, WIG;
5961 VEX, VVVV, WIG;
5965 VEX, VVVV, WIG;
5970 VEX, VVVV, VEX_L, WIG;
5974 VEX, VVVV, VEX_L, WIG;
6122 SchedWriteMPSAD.XMM>, VEX, VVVV, WIG;
6129 SchedWriteDPPS.XMM>, VEX, VVVV, WIG;
6133 SchedWriteDPPD.XMM>, VEX, VVVV, WIG;
6137 SchedWriteDPPS.YMM>, VEX, VVVV, VEX_L, WIG;
6145 SchedWriteMPSAD.YMM>, VEX, VVVV, VEX_L, WIG;
6204 VEX, VVVV, WIG;
6208 VEX, VVVV, VEX_L, WIG;
6212 VEX, VVVV, WIG;
6216 VEX, VVVV, VEX_L, WIG;
6220 VEX, VVVV, WIG;
6227 VEX, VVVV, VEX_L, WIG;
6324 SSEPackedInt>, TA, PD, VEX, VVVV,
6333 RC:$src1))], SSEPackedInt>, TA, PD, VEX, VVVV,
6507 Sched<[SchedWriteVecMoveLSNT.XMM.RM]>, VEX, WIG;
6511 Sched<[SchedWriteVecMoveLSNT.YMM.RM]>, VEX, VEX_L, WIG;
6598 VEX, VVVV, WIG;
6603 VEX, VVVV, VEX_L, WIG;
6627 defm VPCMPISTRM : pcmpistrm_SS42AI<"vpcmpistrm">, VEX, WIG;
6645 defm VPCMPESTRM : SS42AI_pcmpestrm<"vpcmpestrm">, VEX, WIG;
6663 defm VPCMPISTRI : SS42AI_pcmpistri<"vpcmpistri">, VEX, WIG;
6681 defm VPCMPESTRI : SS42AI_pcmpestri<"vpcmpestri">, VEX, WIG;
6827 int_x86_aesni_aesenc, load>, VEX, VVVV, WIG;
6829 int_x86_aesni_aesenclast, load>, VEX, VVVV, WIG;
6831 int_x86_aesni_aesdec, load>, VEX, VVVV, WIG;
6833 int_x86_aesni_aesdeclast, load>, VEX, VVVV, WIG;
6839 i256mem>, VEX, VVVV, VEX_L, WIG;
6842 i256mem>, VEX, VVVV, VEX_L, WIG;
6845 i256mem>, VEX, VVVV, VEX_L, WIG;
6848 i256mem>, VEX, VVVV, VEX_L, WIG;
6869 VEX, WIG;
6874 Sched<[WriteAESIMC.Folded]>, VEX, WIG;
6894 Sched<[WriteAESKeyGen]>, VEX, WIG;
6900 Sched<[WriteAESKeyGen.Folded]>, VEX, WIG;
6989 int_x86_pclmulqdq>, VEX, VVVV, WIG;
6993 int_x86_pclmulqdq_256>, VEX, VVVV, VEX_L, WIG;
7086 Sched<[Sched]>, VEX {
7096 Sched<[Sched]>, VEX;
7129 Sched<[WriteShuffleLd]>, VEX, VEX_L;
7136 Sched<[SchedWriteFShuffle.XMM.Folded]>, VEX, VEX_L;
7170 VEX, VVVV, VEX_L, Sched<[WriteFShuffle256]>;
7174 VEX, VVVV, VEX_L, Sched<[WriteFShuffle256.Folded, WriteFShuffle256.ReadAfterFold]>;
7213 []>, Sched<[WriteFShuffle256]>, VEX, VVVV, VEX_L;
7218 []>, Sched<[WriteFShuffle256.Folded, WriteFShuffle256.ReadAfterFold]>, VEX, VVVV, VEX_L;
7270 []>, Sched<[WriteFShuffle256]>, VEX, VEX_L;
7275 []>, Sched<[WriteFStoreX]>, VEX, VEX_L;
7316 VEX, VVVV, Sched<[schedX.RM]>;
7321 VEX, VVVV, VEX_L, Sched<[schedY.RM]>;
7326 VEX, VVVV, Sched<[schedX.MR]>;
7331 VEX, VVVV, VEX_L, Sched<[schedY.MR]>;
7362 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
7369 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM.Folded,
7379 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
7386 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM.Folded,
7425 [(set RC:$dst, (f_vt (X86VPermilpv RC:$src1, (i_vt RC:$src2))))]>, VEX, VVVV,
7431 (i_vt (load addr:$src2)))))]>, VEX, VVVV,
7437 [(set RC:$dst, (f_vt (X86VPermilpi RC:$src1, (i8 timm:$src2))))]>, VEX,
7443 (f_vt (X86VPermilpi (load addr:$src1), (i8 timm:$src2))))]>, VEX,
7475 [(int_x86_avx_vzeroall)]>, TB, VEX, VEX_L,
7480 [(int_x86_avx_vzeroupper)]>, TB, VEX,
7494 T8, PD, VEX, Sched<[sched]>;
7498 []>, T8, PD, VEX, Sched<[sched.Folded]>;
7507 TA, PD, VEX, Sched<[RR]>;
7512 TA, PD, VEX, Sched<[MR]>;
7559 Sched<[sched]>, VEX, VVVV;
7566 Sched<[sched.Folded, sched.ReadAfterFold]>, VEX, VVVV;
7652 Sched<[SchedWriteShuffle.XMM]>, VEX;
7657 Sched<[SchedWriteShuffle.XMM.Folded]>, VEX;
7662 Sched<[WriteShuffle256]>, VEX, VEX_L;
7667 Sched<[SchedWriteShuffle.XMM.Folded]>, VEX, VEX_L;
7816 Sched<[Sched]>, VEX, VVVV, VEX_L;
7824 Sched<[Sched.Folded, Sched.ReadAfterFold]>, VEX, VVVV, VEX_L;
7842 Sched<[Sched]>, VEX, VEX_L;
7850 Sched<[Sched.Folded, Sched.ReadAfterFold]>, VEX, VEX_L;
7867 Sched<[WriteShuffle256]>, VEX, VVVV, VEX_L;
7871 Sched<[WriteShuffle256.Folded, WriteShuffle256.ReadAfterFold]>, VEX, VVVV, VEX_L;
7889 []>, Sched<[WriteShuffle256]>, VEX, VVVV, VEX_L;
7894 []>, Sched<[WriteShuffle256.Folded, WriteShuffle256.ReadAfterFold]>, VEX, VVVV, VEX_L;
7915 Sched<[WriteShuffle256]>, VEX, VEX_L;
7920 Sched<[SchedWriteVecMoveLS.XMM.MR]>, VEX, VEX_L;
7946 VEX, VVVV, Sched<[schedX.RM]>;
7951 VEX, VVVV, VEX_L, Sched<[schedY.RM]>;
7956 VEX, VVVV, Sched<[schedX.MR]>;
7961 VEX, VVVV, VEX_L, Sched<[schedY.MR]>;
8019 VEX, VVVV, Sched<[SchedWriteVarVecShift.XMM]>;
8026 VEX, VVVV, Sched<[SchedWriteVarVecShift.XMM.Folded,
8033 VEX, VVVV, VEX_L, Sched<[SchedWriteVarVecShift.YMM]>;
8040 VEX, VVVV, VEX_L, Sched<[SchedWriteVarVecShift.YMM.Folded,
8063 []>, VEX, Sched<[WriteLoad, WriteVecMaskedGatherWriteback]>;
8068 []>, VEX, VEX_L, Sched<[WriteLoad, WriteVecMaskedGatherWriteback]>;
8153 VEX, VVVV, REX_W;
8156 VEX, VVVV, VEX_L, REX_W;
8167 i128mem, SchedWriteVecALU.XMM>, VEX, VVVV;
8169 i256mem, SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L;
8190 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8197 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8204 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8211 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8229 VEX, VVVV, Sched<[Sched]>;
8235 VEX, VVVV, Sched<[Sched.Folded, Sched.ReadAfterFold]>;
8284 Sched<[WriteCvtPH2PS]>, VEX;
8289 Sched<[WriteCvtPH2PSY]>, VEX, VEX_L;
8324 defm VCVTNEPS2BF16 : VCVTNEPS2BF16_BASE, VEX, T8, XS, ExplicitVEXPrefix;
8348 VEX, T8, XD, Sched<[WriteVecIMul]>;
8354 VEX, T8, XD, Sched<[WriteVecIMul]>;
8360 VEX_L, VEX, VVVV, T8, XD, Sched<[WriteVecIMul]>;
8372 Sched<[WriteVecIMul]>, VEX, VVVV;
8379 Sched<[WriteVecIMul]>, VEX, VVVV;
8402 defm VSM3RNDS2 : VSM3RNDS2_Base, VEX, VVVV, TA, PD;
8423 defm VSM4KEY4 : SM4_Base<"vsm4key4", VR128, "128", loadv4i32, i128mem>, T8, XS, VEX, VVVV;
8424 defm VSM4KEY4Y : SM4_Base<"vsm4key4", VR256, "256", loadv8i32, i256mem>, T8, XS, VEX_L, VEX, VVVV;
8425 defm VSM4RNDS4 : SM4_Base<"vsm4rnds4", VR128, "128", loadv4i32, i128mem>, T8, XD, VEX, VVVV;
8426 defm VSM4RNDS4Y : SM4_Base<"vsm4rnds4", VR256, "256", loadv8i32, i256mem>, T8, XD, VEX_L, VEX, VVVV;
8437 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8445 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8454 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8462 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;